| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2023-06-06 | target/arm: Add SCTLR.nAA to TBFLAG_A64 | Richard Henderson | 4 | -1/+11 |
| 2023-06-06 | target/arm: Check alignment in helper_mte_check | Richard Henderson | 3 | -1/+22 |
| 2023-06-06 | target/arm: Pass single_memop to gen_mte_checkN | Richard Henderson | 3 | -15/+22 |
| 2023-06-06 | target/arm: Pass memop to gen_mte_check1* | Richard Henderson | 3 | -42/+49 |
| 2023-06-06 | target/arm: Hoist finalize_memop out of do_fp_{ld, st} | Richard Henderson | 1 | -20/+23 |
| 2023-06-06 | target/arm: Hoist finalize_memop out of do_gpr_{ld, st} | Richard Henderson | 1 | -26/+35 |
| 2023-06-06 | target/arm: Load/store integer pair with one tcg operation | Richard Henderson | 1 | -15/+55 |
| 2023-06-06 | target/arm: Sink gen_mte_check1 into load/store_exclusive | Richard Henderson | 1 | -23/+21 |
| 2023-06-06 | target/arm: Use tcg_gen_qemu_{ld, st}_i128 in gen_sve_{ld, st}r | Richard Henderson | 1 | -25/+70 |
| 2023-06-06 | target/arm: Use tcg_gen_qemu_st_i128 for STZG, STZ2G | Richard Henderson | 1 | -7/+10 |
| 2023-06-06 | target/arm: Use tcg_gen_qemu_{st, ld}_i128 for do_fp_{st, ld} | Richard Henderson | 2 | -24/+35 |
| 2023-06-06 | target/arm: Use tcg_gen_qemu_ld_i128 for LDXP | Richard Henderson | 1 | -11/+20 |
| 2023-06-06 | target/arm: Introduce finalize_memop_{atom,pair} | Richard Henderson | 3 | -5/+37 |
| 2023-06-06 | target/arm: Add feature test for FEAT_LSE2 | Richard Henderson | 1 | -0/+5 |
| 2023-06-06 | target/arm: Add commentary for CPUARMState.exclusive_high | Richard Henderson | 1 | -0/+8 |
| 2023-06-06 | hvf: add guest debugging handlers for Apple Silicon hosts | Francesco Cagnin | 2 | -2/+479 |
| 2023-06-06 | hvf: add breakpoint handlers | Francesco Cagnin | 1 | -0/+63 |
| 2023-06-06 | hvf: handle access for more registers | Francesco Cagnin | 1 | -0/+213 |
| 2023-06-06 | arm: move KVM breakpoints helpers | Francesco Cagnin | 4 | -277/+305 |
| 2023-06-05 | target/arm: Add missing include of exec/exec-all.h | Richard Henderson | 1 | -0/+1 |
| 2023-06-05 | target/arm: Tidy helpers for translation | Richard Henderson | 9 | -46/+9 |
| 2023-06-05 | accel/tcg: Introduce translator_io_start | Richard Henderson | 6 | -34/+19 |
| 2023-06-05 | tcg: Split helper-proto.h | Richard Henderson | 1 | -0/+1 |
| 2023-06-05 | tcg: Split helper-gen.h | Richard Henderson | 1 | -5/+3 |
| 2023-06-05 | tcg: Pass TCGHelperInfo to tcg_gen_callN | Richard Henderson | 1 | -0/+3 |
| 2023-06-05 | target/arm: Include helper-gen.h in translator.h | Richard Henderson | 5 | -7/+1 |
| 2023-06-05 | tcg: Split out tcg/oversized-guest.h | Richard Henderson | 1 | -0/+1 |
| 2023-06-05 | target/arm: Fix test of TCG_OVERSIZED_GUEST | Richard Henderson | 1 | -1/+6 |
| 2023-05-30 | target/arm: Explain why we need to select ARM_V7M | Fabiano Rosas | 1 | -0/+3 |
| 2023-05-30 | target/arm: Explicitly select short-format FSR for M-profile | Peter Maydell | 1 | -2/+11 |
| 2023-05-23 | accel/tcg: Unify cpu_{ld,st}*_{be,le}_mmu | Richard Henderson | 1 | -2/+2 |
| 2023-05-19 | Revert "arm/kvm: add support for MTE" | Peter Maydell | 5 | -68/+4 |
| 2023-05-18 | target/arm: Saturate L2CTLR_EL1 core count field rather than overflowing | Peter Maydell | 1 | -2/+9 |
| 2023-05-18 | target/arm: Convert ERET, ERETAA, ERETAB to decodetree | Peter Maydell | 2 | -108/+63 |
| 2023-05-18 | target/arm: Convert BRAA, BRAB, BLRAA, BLRAB to decodetree | Peter Maydell | 2 | -58/+43 |
| 2023-05-18 | target/arm: Convert BRA[AB]Z, BLR[AB]Z, RETA[AB] to decodetree | Peter Maydell | 2 | -55/+84 |
| 2023-05-18 | target/arm: Convert BR, BLR, RET to decodetree | Peter Maydell | 2 | -6/+54 |
| 2023-05-18 | target/arm: Convert conditional branch insns to decodetree | Peter Maydell | 2 | -24/+8 |
| 2023-05-18 | target/arm: Convert TBZ, TBNZ to decodetree | Peter Maydell | 2 | -20/+11 |
| 2023-05-18 | target/arm: Convert CBZ, CBNZ to decodetree | Peter Maydell | 2 | -20/+11 |
| 2023-05-18 | target/arm: Convert unconditional branch immediate to decodetree | Peter Maydell | 2 | -19/+19 |
| 2023-05-18 | target/arm: Convert Extract instructions to decodetree | Peter Maydell | 2 | -63/+34 |
| 2023-05-18 | target/arm: Convert Bitfield to decodetree | Richard Henderson | 2 | -57/+88 |
| 2023-05-18 | target/arm: Convert Move wide (immediate) to decodetree | Richard Henderson | 2 | -43/+41 |
| 2023-05-18 | target/arm: Convert Logical (immediate) to decodetree | Richard Henderson | 2 | -64/+43 |
| 2023-05-18 | target/arm: Replace bitmask64 with MAKE_64BIT_MASK | Richard Henderson | 1 | -9/+2 |
| 2023-05-18 | target/arm: Convert Add/subtract (immediate with tags) to decodetree | Richard Henderson | 2 | -27/+19 |
| 2023-05-18 | target/arm: Convert Add/subtract (immediate) to decodetree | Richard Henderson | 3 | -53/+42 |
| 2023-05-18 | target/arm: Split gen_add_CC and gen_sub_CC | Richard Henderson | 1 | -60/+79 |
| 2023-05-18 | target/arm: Convert PC-rel addressing to decodetree | Richard Henderson | 2 | -24/+27 |
