riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2017-12-13	target/arm: Extend PAR format determination	Edgar E. Iglesias	1	-4/+29
2017-12-13	target/arm: Remove fsr argument from get_phys_addr() and arm_tlb_fill()	Peter Maydell	3	-34/+16
2017-12-13	target/arm: Ignore fsr from get_phys_addr() in do_ats_write()	Peter Maydell	1	-6/+10
2017-12-13	target/arm: Use ARMMMUFaultInfo in deliver_fault()	Peter Maydell	1	-57/+22
2017-12-13	target/arm: Convert get_phys_addr_pmsav8() to not return FSC values	Peter Maydell	1	-11/+18
2017-12-13	target/arm: Convert get_phys_addr_pmsav7() to not return FSC values	Peter Maydell	1	-4/+7
2017-12-13	target/arm: Convert get_phys_addr_pmsav5() to not return FSC values	Peter Maydell	1	-7/+13
2017-12-13	target/arm: Convert get_phys_addr_lpae() to not return FSC values	Peter Maydell	1	-23/+18
2017-12-13	target/arm: Convert get_phys_addr_v6() to not return FSC values	Peter Maydell	1	-18/+22
2017-12-13	target/arm: Convert get_phys_addr_v5() to not return FSC values	Peter Maydell	1	-15/+18
2017-12-13	target/arm: Remove fsr argument from arm_ld*_ptw()	Peter Maydell	1	-13/+11
2017-12-13	target/arm: Provide fault type enum and FSR conversion functions	Peter Maydell	1	-0/+185
2017-12-13	target/arm: Implement TT instruction	Peter Maydell	3	-1/+138
2017-12-13	target/arm: Factor MPU lookup code out of get_phys_addr_pmsav8()	Peter Maydell	1	-51/+79
2017-12-13	target/arm: Create new arm_v7m_mmu_idx_for_secstate_and_priv()	Peter Maydell	1	-5/+16
2017-12-13	target/arm: Split M profile MNegPri mmu index into user and priv	Peter Maydell	4	-29/+50
2017-12-13	target/arm: Add missing M profile case to regime_is_user()	Peter Maydell	1	-0/+1
2017-12-13	target/arm: Allow explicit writes to CONTROL.SPSEL in Handler mode	Peter Maydell	1	-1/+4
2017-12-13	target/arm: Handle SPSEL and current stack being out of sync in MSP/PSP reads	Peter Maydell	1	-6/+4
2017-12-11	target/arm: Generate UNDEF for 32-bit Thumb2 insns	Peter Maydell	1	-1/+4
2017-11-20	arm: check regime, not current state, for ATS write PAR format	Peter Maydell	1	-1/+1
2017-11-20	target/arm: Report GICv3 sysregs present in ID registers if needed	Peter Maydell	1	-4/+40
2017-11-15	target/arm: Fix GETPC usage in do_paired_cmpxchg64_l/be	Richard Henderson	1	-8/+6
2017-11-15	target/arm: Use helper_retaddr in stxp helpers	Richard Henderson	1	-0/+6
2017-11-13	arm/translate-a64: mark path as unreachable to eliminate warning	Emilio G. Cota	1	-0/+2
2017-11-09	disas: Dump insn bytes along with capstone disassembly	Richard Henderson	1	-0/+6
2017-11-07	translate.c: Fix usermode big-endian AArch32 LDREXD and STREXD	Peter Maydell	1	-5/+34
2017-11-07	arm: implement cache/shareability attribute bits for PAR registers	Andrew Baumann	1	-14/+164
2017-10-31	fix WFI/WFE length in syndrome register	Stefano Stabellini	6	-8/+23
2017-10-27	Merge remote-tracking branch 'remotes/rth/tags/pull-dis-20171026' into staging	Peter Maydell	3	-28/+27
2017-10-26	tcg: Avoid setting tcg_initialize if !CONFIG_TCG	Richard Henderson	1	-0/+2
2017-10-25	arm: Support Capstone in disas_set_info	Richard Henderson	1	-3/+18
2017-10-25	disas: Remove unused flags arguments	Richard Henderson	2	-4/+2
2017-10-25	target/arm: Don't set INSN_ARM_BE32 for CONFIG_USER_ONLY	Richard Henderson	1	-2/+7
2017-10-25	target/arm: Move BE32 disassembler fixup	Richard Henderson	1	-19/+0
2017-10-24	tcg: Initialize cpu_env generically	Richard Henderson	2	-5/+0
2017-10-24	tcg: define tcg_init_ctx and make tcg_ctx a pointer	Emilio G. Cota	1	-1/+1
2017-10-24	target/arm: check CF_PARALLEL instead of parallel_cpus	Emilio G. Cota	5	-21/+68
2017-10-24	tcg: convert tb->cflags reads to tb_cflags(tb)	Emilio G. Cota	2	-6/+7
2017-10-24	qom: Introduce CPUClass.tcg_initialize	Richard Henderson	1	-5/+1
2017-10-12	target/arm: Implement SG instruction corner cases	Peter Maydell	1	-1/+22
2017-10-12	target/arm: Support some Thumb insns being always unconditional	Peter Maydell	1	-1/+47
2017-10-12	target-arm: Simplify insn_crosses_page()	Peter Maydell	1	-21/+6
2017-10-12	target/arm: Pull Thumb insn word loads up to top level	Peter Maydell	1	-70/+108
2017-10-12	target-arm: Don't check for "Thumb2 or M profile" for not-Thumb1	Peter Maydell	1	-2/+1
2017-10-12	target/arm: Implement secure function return	Peter Maydell	3	-10/+126
2017-10-12	target/arm: Implement BLXNS	Peter Maydell	4	-2/+76
2017-10-12	target/arm: Implement SG instruction	Peter Maydell	1	-5/+127
2017-10-12	target/arm: Add M profile secure MMU index values to get_a32_user_mem_index()	Peter Maydell	1	-0/+4
2017-10-10	tcg: remove addr argument from lookup_tb_ptr	Emilio G. Cota	2	-6/+3