Age | Commit message (Expand) | Author | Files | Lines |
2020-07-10 | error: Eliminate error_propagate() with Coccinelle, part 1 | Markus Armbruster | 2 | -11/+4 |
2020-07-10 | qom: Use returned bool to check for failure, Coccinelle part | Markus Armbruster | 1 | -2/+1 |
2020-07-10 | qom: Put name parameter before value / visitor parameter | Markus Armbruster | 1 | -1/+1 |
2020-07-10 | qapi: Use returned bool to check for failure, Coccinelle part | Markus Armbruster | 2 | -8/+4 |
2020-07-03 | target/arm: Fix temp double-free in sve ldr/str | Richard Henderson | 3 | -6/+9 |
2020-07-03 | target/arm: kvm: Handle misconfigured dabt injection | Beata Michalska | 5 | -1/+124 |
2020-07-03 | target/arm: kvm: Handle DABT with no valid ISS | Beata Michalska | 1 | -0/+52 |
2020-06-26 | target/arm: Enable MTE | Richard Henderson | 1 | -0/+5 |
2020-06-26 | target/arm: Add allocation tag storage for system mode | Richard Henderson | 1 | -0/+131 |
2020-06-26 | target/arm: Create tagged ram when MTE is enabled | Richard Henderson | 2 | -4/+54 |
2020-06-26 | target/arm: Cache the Tagged bit for a page in MemTxAttrs | Richard Henderson | 2 | -3/+50 |
2020-06-26 | target/arm: Always pass cacheattr to get_phys_addr | Richard Henderson | 4 | -36/+42 |
2020-06-26 | target/arm: Set PSTATE.TCO on exception entry | Richard Henderson | 1 | -0/+3 |
2020-06-26 | target/arm: Implement data cache set allocation tags | Richard Henderson | 3 | -1/+58 |
2020-06-26 | target/arm: Complete TBI clearing for user-only for SVE | Richard Henderson | 3 | -2/+25 |
2020-06-26 | target/arm: Add mte helpers for sve scatter/gather memory ops | Richard Henderson | 3 | -253/+877 |
2020-06-26 | target/arm: Handle TBI for sve scalar + int memory ops | Richard Henderson | 3 | -3/+6 |
2020-06-26 | target/arm: Add mte helpers for sve scalar + int ff/nf loads | Richard Henderson | 3 | -100/+357 |
2020-06-26 | target/arm: Add mte helpers for sve scalar + int stores | Richard Henderson | 3 | -78/+226 |
2020-06-26 | target/arm: Add mte helpers for sve scalar + int loads | Richard Henderson | 5 | -98/+385 |
2020-06-26 | target/arm: Add arm_tlb_bti_gp | Richard Henderson | 3 | -2/+15 |
2020-06-26 | target/arm: Tidy trans_LD1R_zpri | Richard Henderson | 1 | -5/+7 |
2020-06-26 | target/arm: Use mte_check1 for sve LD1R | Richard Henderson | 1 | -2/+4 |
2020-06-26 | target/arm: Use mte_checkN for sve unpredicated stores | Richard Henderson | 1 | -28/+33 |
2020-06-26 | target/arm: Use mte_checkN for sve unpredicated loads | Richard Henderson | 1 | -28/+33 |
2020-06-26 | target/arm: Add helper_mte_check_zva | Richard Henderson | 3 | -1/+122 |
2020-06-26 | target/arm: Implement helper_mte_checkN | Richard Henderson | 2 | -1/+166 |
2020-06-26 | target/arm: Implement helper_mte_check1 | Richard Henderson | 2 | -1/+179 |
2020-06-26 | target/arm: Add gen_mte_checkN | Richard Henderson | 4 | -16/+66 |
2020-06-26 | target/arm: Add gen_mte_check1 | Richard Henderson | 5 | -24/+95 |
2020-06-26 | target/arm: Move regime_tcr to internals.h | Richard Henderson | 2 | -9/+9 |
2020-06-26 | target/arm: Move regime_el to internals.h | Richard Henderson | 2 | -36/+36 |
2020-06-26 | target/arm: Implement the access tag cache flushes | Richard Henderson | 1 | -0/+65 |
2020-06-26 | target/arm: Implement the LDGM, STGM, STZGM instructions | Richard Henderson | 4 | -8/+153 |
2020-06-26 | target/arm: Simplify DC_ZVA | Richard Henderson | 1 | -70/+26 |
2020-06-26 | target/arm: Restrict the values of DCZID.BS under TCG | Richard Henderson | 1 | -0/+24 |
2020-06-26 | target/arm: Implement the STGP instruction | Richard Henderson | 1 | -3/+26 |
2020-06-26 | target/arm: Implement LDG, STG, ST2G instructions | Richard Henderson | 5 | -5/+386 |
2020-06-26 | target/arm: Define arm_cpu_do_unaligned_access for user-only | Richard Henderson | 2 | -3/+3 |
2020-06-26 | target/arm: Implement the SUBP instruction | Richard Henderson | 1 | -2/+22 |
2020-06-26 | target/arm: Implement the GMI instruction | Richard Henderson | 1 | -0/+15 |
2020-06-26 | target/arm: Implement the ADDG, SUBG instructions | Richard Henderson | 4 | -0/+71 |
2020-06-26 | target/arm: Revise decoding for disas_add_sub_imm | Richard Henderson | 1 | -15/+8 |
2020-06-26 | target/arm: Implement the IRG instruction | Richard Henderson | 5 | -0/+98 |
2020-06-26 | target/arm: Add MTE bits to tb_flags | Richard Henderson | 5 | -4/+75 |
2020-06-26 | target/arm: Add MTE system registers | Richard Henderson | 4 | -0/+128 |
2020-06-26 | target/arm: Add DISAS_UPDATE_NOCHAIN | Richard Henderson | 3 | -0/+9 |
2020-06-26 | target/arm: Rename DISAS_UPDATE to DISAS_UPDATE_EXIT | Richard Henderson | 4 | -18/+20 |
2020-06-26 | target/arm: Add support for MTE to HCR_EL2 and SCR_EL3 | Richard Henderson | 1 | -3/+11 |
2020-06-26 | target/arm: Add support for MTE to SCTLR_ELx | Richard Henderson | 1 | -6/+17 |