riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2023-01-23	target/arm: Look up ARMCPRegInfo at runtime	Richard Henderson	5	-49/+95
2023-01-23	target/arm: Reorg do_coproc_insn	Richard Henderson	1	-186/+186
2023-01-23	target/arm: provide stubs for more external debug registers	Evgeny Iakovlev	1	-0/+21
2023-01-23	target/arm: implement DBGCLAIM registers	Evgeny Iakovlev	2	-0/+34
2023-01-23	target/arm: Don't set EXC_RETURN.ES if Security Extension not present	Peter Maydell	1	-1/+1
2023-01-23	target/arm: Fix in_debug path in S1_ptw_translate	Richard Henderson	1	-2/+2
2023-01-23	target/arm: Fix physical address resolution for MTE	Richard Henderson	1	-1/+1
2023-01-23	target/arm/sme: Unify set_pstate() SM/ZA helpers as set_svcr()	Richard Henderson	4	-19/+5
2023-01-23	target/arm/sme: Rebuild hflags in aarch64_set_svcr()	Richard Henderson	2	-9/+5
2023-01-23	target/arm/sme: Reset ZA state in aarch64_set_svcr()	Richard Henderson	2	-12/+12
2023-01-23	target/arm/sme: Reset SVE state in aarch64_set_svcr()	Richard Henderson	3	-11/+13
2023-01-23	target/arm/sme: Introduce aarch64_set_svcr()	Richard Henderson	3	-2/+11
2023-01-23	target/arm/sme: Rebuild hflags in set_pstate() helpers	Richard Henderson	2	-1/+2
2023-01-23	target/arm/sme: Reorg SME access handling in handle_msr_i()	Richard Henderson	1	-11/+13
2023-01-23	target/arm: Unify checking for M Main Extension in MRS/MSR	David Reiss	1	-2/+20
2023-01-23	target/arm: Widen cnthctl_el2 to uint64_t	Richard Henderson	1	-1/+1
2023-01-13	target/arm: allow writes to SCR_EL3.HXEn bit when FEAT_HCX is enabled	Evgeny Iakovlev	1	-0/+3
2023-01-12	target/arm: Fix sve_probe_page	Richard Henderson	1	-5/+9
2023-01-05	target/arm: align exposed ID registers with Linux	Zhuojia Shen	1	-17/+79
2023-01-05	target/arm: cleanup cpu includes	Claudio Fontana	2	-7/+0
2023-01-05	target/arm: Remove unused includes from helper.c	Fabiano Rosas	1	-7/+0
2023-01-05	target/arm: Remove unused includes from m_helper.c	Fabiano Rosas	1	-16/+0
2023-01-05	target/arm: Fix checkpatch brace errors in helper.c	Fabiano Rosas	1	-25/+42
2023-01-05	target/arm: Fix checkpatch space errors in helper.c	Fabiano Rosas	1	-21/+21
2023-01-05	target/arm: Fix checkpatch comment style warnings in helper.c	Fabiano Rosas	1	-108/+215
2023-01-05	target/arm: fix handling of HLT semihosting in system mode	Alex Bennée	1	-1/+1
2023-01-05	target/arm: Add ARM Cortex-R52 CPU	Tobias Röhmel	1	-0/+42
2023-01-05	target/arm: Add PMSAv8r functionality	Tobias Röhmel	1	-22/+104
2023-01-05	target/arm: Add PMSAv8r registers	Tobias Röhmel	4	-4/+360
2023-01-05	target/arm: Enable TTBCR_EAE for ARMv8-R AArch32	Tobias Röhmel	3	-0/+11
2023-01-05	target/arm: Make stage_2_format for cache attributes optional	Tobias Röhmel	1	-2/+8
2023-01-05	target/arm: Make RVBAR available for all ARMv8 CPUs	Tobias Röhmel	2	-8/+19
2023-01-05	target/arm: Don't add all MIDR aliases for cores that implement PMSA	Tobias Röhmel	1	-4/+9
2023-01-05	target/arm:Set lg_page_size to 0 if either S1 or S2 asks for it	Peter Maydell	1	-3/+13
2022-12-16	target/arm: Convert to 3-phase reset	Peter Maydell	2	-6/+11
2022-12-15	target/arm: Restrict arm_cpu_exec_interrupt() to TCG accelerator	Philippe Mathieu-Daudé	1	-2/+3
2022-12-15	hw/misc: Move some arm-related files from specific_ss into softmmu_ss	Thomas Huth	1	-4/+4
2022-12-15	target/arm: Report FEAT_EVT for TCG '-cpu max'	Peter Maydell	2	-0/+2
2022-12-15	target/arm: Implement HCR_EL2.TID4 traps	Peter Maydell	1	-8/+9
2022-12-15	target/arm: Implement HCR_EL2.TICAB,TOCU traps	Peter Maydell	1	-13/+23
2022-12-15	target/arm: Implement HCR_EL2.TTLBOS traps	Peter Maydell	1	-10/+23
2022-12-15	target/arm: Implement HCR_EL2.TTLBIS traps	Peter Maydell	1	-16/+27
2022-12-15	target/arm: Allow relevant HCR bits to be written for FEAT_EVT	Peter Maydell	2	-0/+36
2022-12-15	target/arm: Add Cortex-A55 CPU	Timofey Kutergin	1	-0/+69
2022-12-14	qapi machine: Elide redundant has_FOO in generated C	Markus Armbruster	1	-1/+0
2022-11-29	target/arm: Set TCGCPUOps.restore_state_to_opc for v7m	Evgeny Ermakov	3	-3/+8
2022-11-22	target/arm: Use signed quantity to represent VMSAv8-64 translation level	Ard Biesheuvel	1	-2/+2
2022-11-22	target/arm: Don't do two-stage lookup if stage 2 is disabled	Peter Maydell	1	-3/+4
2022-11-21	target/arm: Limit LPA2 effective output address when TCR.DS == 0	Ard Biesheuvel	1	-0/+8
2022-11-04	target/arm: Two fixes for secure ptw	Richard Henderson	1	-7/+8