riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2021-08-25	target/arm: Implement MVE VPNOT	Peter Maydell	4	-0/+38
2021-08-25	target/arm: Implement MVE VMOV to/from 2 general-purpose registers	Peter Maydell	4	-1/+91
2021-08-25	target/arm: Implement MVE VMAXA, VMINA	Peter Maydell	4	-0/+40
2021-08-25	target/arm: Implement MVE VQABS, VQNEG	Peter Maydell	4	-0/+50
2021-08-25	target/arm: Implement MVE saturating doubling multiply accumulates	Peter Maydell	4	-0/+120
2021-08-25	target/arm: Implement MVE VMLA	Peter Maydell	4	-0/+11
2021-08-25	target/arm: Implement MVE VMLADAV and VMLSLDAV	Peter Maydell	4	-5/+150
2021-08-25	target/arm: Rename MVEGenDualAccOpFn to MVEGenLongDualAccOpFn	Peter Maydell	1	-8/+8
2021-08-25	target/arm: Implement MVE narrowing moves	Peter Maydell	4	-0/+132
2021-08-25	target/arm: Implement MVE VABAV	Peter Maydell	4	-0/+82
2021-08-25	target/arm: Implement MVE integer min/max across vector	Peter Maydell	4	-2/+150
2021-08-25	target/arm: Move 'x' and 'a' bit definitions into vmlaldav formats	Peter Maydell	1	-8/+8
2021-08-25	target/arm: Implement MVE shift-by-scalar	Peter Maydell	4	-3/+76
2021-08-25	target/arm: Implement MVE VMLAS	Peter Maydell	4	-0/+34
2021-08-25	target/arm: Implement MVE VPSEL	Peter Maydell	4	-2/+28
2021-08-25	target/arm: Implement MVE integer vector-vs-scalar comparisons	Peter Maydell	4	-12/+127
2021-08-25	target/arm: Implement MVE integer vector comparisons	Peter Maydell	4	-1/+152
2021-08-25	target/arm: Factor out gen_vpst()	Peter Maydell	1	-14/+17
2021-08-25	target/arm: Implement MVE incrementing/decrementing dup insns	Peter Maydell	4	-0/+220
2021-08-25	target/arm: Implement MVE VMULL (polynomial)	Peter Maydell	6	-5/+83
2021-08-25	target/arm: Fix VLDRB/H/W for predicated elements	Peter Maydell	1	-3/+5
2021-08-25	target/arm: Fix VPT advance when ECI is non-zero	Peter Maydell	1	-7/+17
2021-08-25	target/arm: Factor out mve_eci_mask()	Peter Maydell	1	-24/+34
2021-08-25	target/arm: Fix calculation of LTP mask when LR is 0	Peter Maydell	1	-1/+2
2021-08-25	target/arm: Fix MVE 48-bit SQRSHRL for small right shifts	Peter Maydell	1	-2/+9
2021-08-25	target/arm: Fix 48-bit saturating shifts	Peter Maydell	1	-7/+5
2021-08-25	target/arm: Fix mask handling for MVE narrowing operations	Peter Maydell	1	-1/+3
2021-08-25	target/arm: Fix signed VADDV	Peter Maydell	1	-3/+3
2021-08-25	target/arm: Fix MVE VSLI by 0 and VSRI by <dt>	Peter Maydell	1	-4/+5
2021-08-25	target/arm: Print MVE VPR in CPU dumps	Peter Maydell	1	-0/+3
2021-08-25	target/arm: Note that we handle VMOVL as a special case of VSHLL	Peter Maydell	1	-0/+2
2021-07-27	target/arm: Add sve-default-vector-length cpu property	Richard Henderson	3	-2/+77
2021-07-27	target/arm: Export aarch64_sve_zcr_get_valid_len	Richard Henderson	2	-2/+12
2021-07-27	target/arm: Correctly bound length in sve_zcr_get_valid_len	Richard Henderson	1	-1/+3
2021-07-27	target/arm: Report M-profile alignment faults correctly to the guest	Peter Maydell	1	-0/+8
2021-07-27	target/arm: Add missing 'return's after calling v7m_exception_taken()	Peter Maydell	1	-0/+2
2021-07-27	target/arm: Enforce that M-profile SP low 2 bits are always zero	Peter Maydell	3	-6/+15
2021-07-21	accel/tcg: Remove TranslatorOps.breakpoint_check	Richard Henderson	4	-63/+0
2021-07-21	target/arm: Implement debug_check_breakpoint	Richard Henderson	4	-4/+8
2021-07-21	tcg: Rename helper_atomic_*_mmu and provide for user-only	Richard Henderson	1	-4/+4
2021-07-18	target/arm: Remove duplicate 'plus1' function from Neon and SVE decode	Peter Maydell	5	-14/+4
2021-07-18	target/arm: Fix offsets for TTBCR	Richard Henderson	1	-4/+7
2021-07-12	Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210710' into...	Peter Maydell	3	-36/+8
2021-07-11	Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into ...	Peter Maydell	1	-0/+6
2021-07-09	target/arm: Use translator_use_goto_tb for aarch32	Richard Henderson	1	-11/+1
2021-07-09	target/arm: Use translator_use_goto_tb for aarch64	Richard Henderson	1	-20/+5
2021-07-09	target/arm: Use DISAS_TOO_MANY for ISB and SB	Richard Henderson	1	-2/+2
2021-07-09	tcg: Avoid including 'trace-tcg.h' in target translate.c	Philippe Mathieu-Daudé	3	-3/+0
2021-07-09	meson: Introduce target-specific Kconfig	Philippe Mathieu-Daudé	1	-0/+6
2021-07-09	target/arm: Correct the encoding of MDCCSR_EL0 and DBGDSCRint	hnick@vmware.com	1	-3/+13