| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2020-09-02 | arm: Fix typo in AARCH64_CPU_GET_CLASS definition | Eduardo Habkost | 1 | -1/+1 |
| 2020-09-01 | Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200901'... | Peter Maydell | 13 | -800/+1687 |
| 2020-09-01 | target/arm: Enable FP16 in '-cpu max' | Peter Maydell | 2 | -7/+6 |
| 2020-09-01 | target/arm: Implement fp16 for Neon VMUL, VMLA, VMLS | Peter Maydell | 1 | -55/+55 |
| 2020-09-01 | target/arm/vec_helper: Add gvec fp indexed multiply-and-add operations | Peter Maydell | 2 | -5/+32 |
| 2020-09-01 | target/arm/vec_helper: Handle oprsz less than 16 bytes in indexed operations | Peter Maydell | 1 | -4/+8 |
| 2020-09-01 | target/arm: Implement fp16 for Neon VRINTX | Peter Maydell | 3 | -42/+9 |
| 2020-09-01 | target/arm: Implement fp16 for Neon VRINT-with-specified-rounding-mode | Peter Maydell | 4 | -79/+30 |
| 2020-09-01 | target/arm: Implement fp16 for Neon VCVT with rounding modes | Peter Maydell | 3 | -67/+66 |
| 2020-09-01 | target/arm: Implement fp16 for Neon VCVT fixed-point | Peter Maydell | 4 | -1/+21 |
| 2020-09-01 | target/arm: Convert Neon VCVT fixed-point to gvec | Peter Maydell | 3 | -17/+43 |
| 2020-09-01 | target/arm: Implement fp16 for Neon float-integer VCVT | Peter Maydell | 3 | -11/+42 |
| 2020-09-01 | target/arm: Implement fp16 for Neon pairwise fp ops | Peter Maydell | 3 | -26/+68 |
| 2020-09-01 | target/arm: Implement fp16 for Neon VRSQRTS | Peter Maydell | 4 | -36/+34 |
| 2020-09-01 | target/arm: Implement fp16 for Neon VRECPS | Peter Maydell | 4 | -34/+35 |
| 2020-09-01 | target/arm: Implement fp16 for Neon fp compare-vs-0 | Peter Maydell | 3 | -28/+45 |
| 2020-09-01 | target/arm: Implement fp16 for Neon VFMA, VMFS | Peter Maydell | 3 | -91/+40 |
| 2020-09-01 | target/arm: Implement fp16 for Neon VMLA, VMLS operations | Peter Maydell | 3 | -31/+50 |
| 2020-09-01 | target/arm: Implement fp16 for Neon VMAXNM, VMINNM | Peter Maydell | 3 | -8/+27 |
| 2020-09-01 | target/arm: Implement fp16 for Neon VMAX, VMIN | Peter Maydell | 3 | -3/+14 |
| 2020-09-01 | target/arm: Implement fp16 for VACGE, VACGT | Peter Maydell | 3 | -2/+34 |
| 2020-09-01 | target/arm: Implement fp16 for VCEQ, VCGE, VCGT comparisons | Peter Maydell | 3 | -3/+56 |
| 2020-09-01 | target/arm: Implement fp16 for Neon VABS, VNEG of floats | Peter Maydell | 1 | -6/+28 |
| 2020-09-01 | target/arm: Implement fp16 for Neon VRECPE, VRSQRTE using gvec | Peter Maydell | 1 | -2/+29 |
| 2020-09-01 | target/arm: Implement FP16 for Neon VADD, VSUB, VABD, VMUL | Peter Maydell | 3 | -17/+26 |
| 2020-09-01 | target/arm: Implement VFP fp16 VMOV between gp and halfprec registers | Peter Maydell | 2 | -0/+35 |
| 2020-09-01 | target/arm: Implement new VFP fp16 insn VMOVX | Peter Maydell | 2 | -0/+28 |
| 2020-09-01 | target/arm: Implement new VFP fp16 insn VINS | Peter Maydell | 2 | -0/+31 |
| 2020-09-01 | target/arm: Implement VFP fp16 VRINT* | Peter Maydell | 5 | -8/+122 |
| 2020-09-01 | target/arm: Implement VFP fp16 VSEL | Peter Maydell | 2 | -6/+16 |
| 2020-09-01 | target/arm: Implement VFP vp16 VCVT-with-specified-rounding-mode | Peter Maydell | 2 | -10/+28 |
| 2020-09-01 | target/arm: Implement VFP fp16 VCVT between float and fixed-point | Peter Maydell | 2 | -0/+61 |
| 2020-09-01 | target/arm: Use macros instead of open-coding fp16 conversion helpers | Peter Maydell | 2 | -80/+12 |
| 2020-09-01 | target/arm: Make VFP_CONV_FIX macros take separate float type and float size | Peter Maydell | 1 | -23/+23 |
| 2020-09-01 | target/arm: Implement VFP fp16 VCVT between float and integer | Peter Maydell | 2 | -0/+69 |
| 2020-09-01 | target/arm: Implement VFP fp16 VLDR and VSTR | Peter Maydell | 2 | -2/+36 |
| 2020-09-01 | target/arm: Implement VFP fp16 VCMP | Peter Maydell | 4 | -7/+51 |
| 2020-09-01 | target/arm: Implement VFP fp16 for VMOV immediate | Peter Maydell | 2 | -0/+24 |
| 2020-09-01 | target/arm: Implement VFP fp16 for VABS, VNEG, VSQRT | Peter Maydell | 4 | -0/+55 |
| 2020-09-01 | target/arm: Macroify uses of do_vfp_2op_sp() and do_vfp_2op_dp() | Peter Maydell | 1 | -35/+14 |
| 2020-09-01 | target/arm: Implement VFP fp16 for fused-multiply-add | Peter Maydell | 4 | -0/+77 |
| 2020-09-01 | target/arm: Macroify trans functions for VFMA, VFMS, VFNMA, VFNMS | Peter Maydell | 1 | -37/+13 |
| 2020-09-01 | target/arm: Implement VFP fp16 VMLA, VMLS, VNMLS, VNMLA, VNMUL | Peter Maydell | 4 | -0/+95 |
| 2020-09-01 | target/arm: Implement VFP fp16 for VFP_BINOP operations | Peter Maydell | 5 | -0/+106 |
| 2020-09-01 | target/arm: Use correct ID register check for aa32_fp16_arith | Peter Maydell | 1 | -6/+1 |
| 2020-09-01 | target/arm: Remove local definitions of float constants | Peter Maydell | 3 | -19/+0 |
| 2020-09-01 | target/arm/translate-a64:Remove redundant statement in disas_simd_two_reg_mis... | Chen Qun | 1 | -3/+0 |
| 2020-09-01 | target/arm/translate-a64:Remove dead assignment in handle_scalar_simd_shli() | Chen Qun | 1 | -2/+2 |
| 2020-09-01 | target/arm/kvm: Remove superfluous break | Liao Pingfang | 1 | -1/+0 |
| 2020-08-28 | target/arm: Convert sq{, r}dmulh to gvec for aa64 advsimd | Richard Henderson | 3 | -10/+81 |
