riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2023-07-09	target/arm: Use aesdec_IMC	Richard Henderson	1	-19/+14
2023-07-09	target/arm: Use aesenc_MC	Richard Henderson	1	-1/+14
2023-07-09	target/arm: Use aesdec_ISB_ISR_AK	Richard Henderson	1	-21/+16
2023-07-09	target/arm: Use aesenc_SB_SR_AK	Richard Henderson	1	-1/+23
2023-07-08	target/arm: Demultiplex AESE and AESMC	Richard Henderson	6	-27/+41
2023-07-08	target/arm: Move aesmc and aesimc tables to crypto/aes.c	Richard Henderson	1	-138/+5
2023-07-06	target/arm: Avoid over-length shift in arm_cpu_sve_finalize() error case	Peter Maydell	1	-2/+2
2023-07-06	target/arm: Define neoverse-v1	Peter Maydell	1	-0/+128
2023-07-06	target/arm: Suppress more TCG unimplemented features in ID registers	Peter Maydell	1	-4/+29
2023-07-06	target/arm: gdbstub: Guard M-profile code with CONFIG_TCG	Fabiano Rosas	1	-0/+4
2023-07-06	target/arm: Handle IC IVAU to improve compatibility with JITs	John Högberg	2	-3/+55
2023-07-06	target/arm: Fix SME full tile indexing	Richard Henderson	1	-6/+18
2023-07-06	target/arm: Dump ZA[] when active	Richard Henderson	1	-0/+18
2023-07-06	target/arm: Avoid splitting Zregs across lines in dump	Richard Henderson	1	-22/+14
2023-07-04	target/arm: Add raw_writes ops for register whose write induce TLB maintenance	Eric Auger	1	-10/+13
2023-07-03	plugins: force slow path when plugins instrument memory ops	Alex Bennée	2	-11/+7
2023-07-03	target/arm: make arm_casq_ptw CONFIG_TCG only	Alex Bennée	1	-2/+2
2023-07-01	target/arm: Use float64_to_int32_modulo for FJCVTZS	Richard Henderson	1	-61/+14
2023-06-28	exec/memory: Add symbol for the min value of memory listener priority	Isaku Yamahata	1	-0/+1
2023-06-28	target/arm: Restrict KVM-specific fields from ArchCPU	Philippe Mathieu-Daudé	1	-0/+2
2023-06-28	hw/intc/arm_gic: Un-inline GIC*/ITS class_name() helpers	Philippe Mathieu-Daudé	1	-45/+0
2023-06-28	accel: Rename HVF 'struct hvf_vcpu_state' -> AccelCPUState	Philippe Mathieu-Daudé	1	-54/+54
2023-06-26	target: Widen pc/cs_base in cpu_get_tb_cpu_state	Anton Johansson	2	-4/+4
2023-06-23	target/arm: Fix sve predicate store, 8 <= VQ <= 15	Richard Henderson	1	-1/+1
2023-06-23	target/arm: Restructure has_vfp_d32 test	Richard Henderson	1	-13/+15
2023-06-23	target/arm: Add cpu properties for enabling FEAT_RME	Richard Henderson	1	-0/+53
2023-06-23	target/arm: Implement the granule protection check	Richard Henderson	1	-17/+232
2023-06-23	target/arm: Implement GPC exceptions	Richard Henderson	4	-3/+126
2023-06-23	target/arm: Add GPC syndrome	Richard Henderson	1	-0/+10
2023-06-23	target/arm: Use get_phys_addr_with_struct for stage2	Richard Henderson	1	-10/+1
2023-06-23	target/arm: Move s1_is_el0 into S1Translate	Richard Henderson	1	-15/+12
2023-06-23	target/arm: Use get_phys_addr_with_struct in S1_ptw_translate	Richard Henderson	1	-28/+18
2023-06-23	target/arm: Handle no-execute for Realm and Root regimes	Richard Henderson	1	-6/+46
2023-06-23	target/arm: Handle Block and Page bits for security space	Richard Henderson	1	-16/+73
2023-06-23	target/arm: NSTable is RES0 for the RME EL3 regime	Richard Henderson	1	-14/+14
2023-06-23	target/arm: Pipe ARMSecuritySpace through ptw.c	Richard Henderson	1	-15/+71
2023-06-23	target/arm: Remove __attribute__((nonnull)) from ptw.c	Richard Henderson	1	-4/+2
2023-06-23	target/arm: Introduce ARMMMUIdx_Phys_{Realm,Root}	Richard Henderson	2	-4/+29
2023-06-23	target/arm: Adjust the order of Phys and Stage2 ARMMMUIdx	Richard Henderson	2	-13/+11
2023-06-23	target/arm: Introduce ARMSecuritySpace	Richard Henderson	2	-22/+127
2023-06-23	target/arm: Add RME cpregs	Richard Henderson	2	-0/+103
2023-06-23	target/arm: SCR_EL3.NS may be RES1	Richard Henderson	1	-0/+3
2023-06-23	target/arm: Update SCR and HCR for RME	Richard Henderson	2	-4/+11
2023-06-23	target/arm: Add isar_feature_aa64_rme	Richard Henderson	2	-0/+10
2023-06-20	meson: Replace softmmu_ss -> system_ss	Philippe Mathieu-Daudé	3	-5/+5
2023-06-19	target/arm: Convert load/store tags insns to decodetree	Peter Maydell	2	-177/+190
2023-06-19	target/arm: Convert load/store single structure to decodetree	Peter Maydell	2	-108/+127
2023-06-19	target/arm: Convert load/store (multiple structures) to decodetree	Peter Maydell	2	-108/+128
2023-06-19	target/arm: Convert LDAPR/STLR (imm) to decodetree	Peter Maydell	2	-84/+54
2023-06-19	target/arm: Convert load (pointer auth) insns to decodetree	Peter Maydell	2	-67/+23