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AgeCommit message (Expand)AuthorFilesLines
2017-02-10target-arm: Enable vPMU support under TCG modeWei Huang2-7/+2
2017-02-10target-arm: Add support for PMU register PMINTENSET_EL1Wei Huang2-2/+10
2017-02-10target-arm: Add support for AArch64 PMU register PMXEVTYPER_EL0Wei Huang2-6/+25
2017-02-10target-arm: Add support for PMU register PMSELR_EL0Wei Huang2-6/+22
2017-02-07target/arm: A32, T32: Create Instruction Syndromes for Data AbortsPeter Maydell3-63/+149
2017-02-07target/arm: Abstract out pbit/wbit tests in ARM ldr/str decodePeter Maydell1-3/+6
2017-02-07arm: Correctly handle watchpoints for BE32 CPUsJulian Brown3-0/+30
2017-02-07Fix Thumb-1 BE32 execution and disassembly.Julian Brown2-1/+32
2017-02-07target/arm: Add cfgend parameter for ARM CPU selection.Julian Brown2-0/+20
2017-02-01arm: add trailing ; after MISMATCH_CHECKMichael S. Tsirkin1-49/+49
2017-02-01arm: better stub version for MISMATCH_CHECKMichael S. Tsirkin1-1/+3
2017-01-27armv7m: R14 should reset to 0xffffffffPeter Maydell1-0/+3
2017-01-27armv7m: FAULTMASK should be 0 on resetMichael Davidsaver1-4/+6
2017-01-27armv7m: Report no-coprocessor faults correctlyPeter Maydell3-0/+13
2017-01-27armv7m: set CFSR.UNDEFINSTR on undefined instructionsMichael Davidsaver1-0/+1
2017-01-27armv7m: honour CCR.STACKALIGN on exception entryMichael Davidsaver1-4/+2
2017-01-27armv7m: add state for v7M CCR, CFSR, HFSR, DFSR, MMFAR, BFARPeter Maydell3-2/+69
2017-01-27target/arm: Drop IS_M() macroPeter Maydell3-8/+2
2017-01-27armv7m: Clear FAULTMASK on return from non-NMI exceptionsMichael Davidsaver1-1/+6
2017-01-27armv7m: Fix reads of CONTROL register bit 1Michael Davidsaver4-17/+32
2017-01-27armv7m: Explicit error for bad vector tableMichael Davidsaver1-1/+25
2017-01-27armv7m: Replace armv7m.hack with unassigned_access handlerMichael Davidsaver2-6/+34
2017-01-27armv7m: MRS/MSR: handle unprivileged accessMichael Davidsaver1-42/+37
2017-01-24migration: extend VMStateInfoJianjun Duan1-4/+10
2017-01-20Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell1-1/+1
2017-01-20target-arm: Enable EL2 feature bit on A53 and A57Peter Maydell3-0/+16
2017-01-20target/arm/psci.c: If EL2 implemented, start CPUs in EL2Peter Maydell1-7/+18
2017-01-20target-arm: Add ARMCPU fields for GIC CPU i/f configPeter Maydell2-0/+11
2017-01-20target-arm: Expose output GPIO line for VCPU maintenance interruptPeter Maydell2-0/+5
2017-01-20target/arm: Implement DBGVCR32_EL2 system registerPeter Maydell1-0/+7
2017-01-20target/arm: Handle VIRQ and VFIQ in arm_cpu_do_interrupt_aarch32()Peter Maydell1-0/+14
2017-01-19kvm: move cpu synchronization codeVincent Palatin1-1/+1
2017-01-16Merge remote-tracking branch 'remotes/stsquad/tags/pull-tcg-common-tlb-reset-...Peter Maydell3-17/+19
2017-01-13target/arm: Fix ubfx et al for aarch64Richard Henderson1-1/+1
2017-01-13Merge remote-tracking branch 'remotes/ehabkost/tags/x86-and-machine-pull-requ...Peter Maydell1-0/+1
2017-01-13cputlb: drop flush_global flag from tlb_flushAlex Bennée1-13/+13
2017-01-13qom/cpu: move tlb_flush to cpu_common_resetAlex Bennée2-4/+6
2017-01-12qmp: Report QOM type name on query-cpu-definitionsEduardo Habkost1-0/+1
2017-01-10target-arm: Use clrsb helperRichard Henderson3-16/+4
2017-01-10target-arm: Use clz opcodeRichard Henderson6-25/+7
2017-01-10target-arm: Use new deposit and extract opsRichard Henderson2-81/+37
2016-12-27target-arm: Add VBAR support to ARM1176 CPUsCédric Le Goater3-6/+23
2016-12-27target-arm: Log AArch64 exception returnsPeter Maydell1-0/+9
2016-12-27target-arm: Fix aarch64 disas_ldst_single_structRichard Henderson1-2/+2
2016-12-27target-arm: Fix aarch64 vec_reg_offsetRichard Henderson1-1/+2
2016-12-27Correct value of ARM Cortex-A8 MVFR1 register.Julian Brown1-1/+1
2016-12-20Move target-* CPU file into a target/ folderThomas Huth35-0/+49062
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