Age | Commit message (Expand) | Author | Files | Lines |
2017-08-01 | trace-events: fix code style: print 0x before hex numbers | Vladimir Sementsov-Ogievskiy | 1 | -5/+5 |
2017-07-31 | target/arm: Migrate MPU_RNR register state for M profile cores | Peter Maydell | 1 | -0/+28 |
2017-07-31 | target/arm: Move PMSAv7 reset into arm_cpu_reset() so M profile MPUs get reset | Peter Maydell | 2 | -16/+26 |
2017-07-31 | target/arm: Rename cp15.c6_rgnr to pmsav7.rnr | Peter Maydell | 3 | -6/+5 |
2017-07-31 | target/arm: Don't allow guest to make System space executable for M profile | Peter Maydell | 1 | -1/+15 |
2017-07-31 | target/arm: Don't do MPU lookups for addresses in M profile PPB region | Peter Maydell | 1 | -1/+16 |
2017-07-31 | target/arm: Correct MPU trace handling of write vs execute | Peter Maydell | 1 | -2/+2 |
2017-07-31 | docs: fix broken paths to docs/devel/tracing.txt | Philippe Mathieu-Daudé | 1 | -1/+1 |
2017-07-24 | target/arm: fix TCG temp leak in aarch64 rev16 | Emilio G. Cota | 1 | -0/+1 |
2017-07-19 | tcg: Pass generic CPUState to gen_intermediate_code() | Lluís Vilanova | 3 | -8/+8 |
2017-07-19 | target/arm: optimize aarch32 rev16 | Aurelien Jarno | 1 | -2/+4 |
2017-07-19 | target/arm: Optimize aarch64 rev16 | Richard Henderson | 1 | -18/+6 |
2017-07-17 | target/arm: use DISAS_EXIT for eret handling | Alex Bennée | 2 | -3/+6 |
2017-07-17 | target/arm: use gen_goto_tb for ISB handling | Alex Bennée | 2 | -3/+3 |
2017-07-17 | target/arm/translate: ensure gen_goto_tb sets exit flags | Alex Bennée | 1 | -1/+5 |
2017-07-17 | target/arm/translate.h: expand comment on DISAS_EXIT | Alex Bennée | 1 | -1/+4 |
2017-07-17 | target/arm/translate: make DISAS_UPDATE match declared semantics | Alex Bennée | 2 | -10/+10 |
2017-07-17 | target/arm: Make Cortex-M3 and M4 default to 8 PMSA regions | Peter Maydell | 1 | -1/+11 |
2017-07-11 | target-arm: v7M: ignore writes to CONTROL.SPSEL from Thread mode | Peter Maydell | 1 | -3/+10 |
2017-07-11 | ARM: KVM: Enable in-kernel timers with user space gic | Alexander Graf | 2 | -0/+54 |
2017-06-19 | target/arm: Exit after clearing aarch64 interrupt mask | Richard Henderson | 1 | -1/+6 |
2017-06-06 | Merge remote-tracking branch 'remotes/ehabkost/tags/x86-and-machine-pull-requ... | Peter Maydell | 2 | -1/+3 |
2017-06-05 | numa: move numa_node from CPUState into target specific classes | Igor Mammedov | 2 | -1/+3 |
2017-06-05 | target/aarch64: optimize indirect branches | Emilio G. Cota | 1 | -2/+1 |
2017-06-05 | target/aarch64: optimize cross-page direct jumps in softmmu | Emilio G. Cota | 1 | -1/+1 |
2017-06-05 | target/arm: optimize indirect branches | Emilio G. Cota | 2 | -9/+20 |
2017-06-05 | target/arm: optimize cross-page direct jumps in softmmu | Emilio G. Cota | 1 | -1/+5 |
2017-06-04 | target/arm: add data cache invalidation cp15 instruction to cortex-r5 | Luc MICHEL | 1 | -0/+2 |
2017-06-02 | arm: Implement HFNMIENA support for M profile MPU | Peter Maydell | 3 | -2/+41 |
2017-06-02 | arm: add MPU support to M profile CPUs | Michael Davidsaver | 3 | -3/+33 |
2017-06-02 | armv7m: Classify faults as MemManage or BusFault | Michael Davidsaver | 1 | -3/+42 |
2017-06-02 | arm: All M profile cores are PMSA | Peter Maydell | 1 | -0/+8 |
2017-06-02 | armv7m: Implement M profile default memory map | Michael Davidsaver | 1 | -9/+32 |
2017-06-02 | armv7m: Improve "-d mmu" tracing for PMSAv7 MPU | Michael Davidsaver | 1 | -12/+27 |
2017-06-02 | arm: Remove unnecessary check on cpu->pmsav7_dregion | Peter Maydell | 1 | -2/+1 |
2017-06-02 | arm: Don't let no-MPU PMSA cores write to SCTLR.M | Peter Maydell | 1 | -0/+5 |
2017-06-02 | arm: Don't clear ARM_FEATURE_PMSA for no-mpu configs | Peter Maydell | 1 | -1/+7 |
2017-06-02 | arm: Clean up handling of no-MPU PMSA CPUs | Peter Maydell | 4 | -14/+14 |
2017-06-02 | arm: Use different ARMMMUIdx values for M profile | Peter Maydell | 3 | -2/+27 |
2017-06-02 | arm: Add support for M profile CPUs having different MMU index semantics | Peter Maydell | 6 | -99/+156 |
2017-06-02 | arm: Use the mmu_idx we're passed in arm_cpu_do_unaligned_access() | Peter Maydell | 1 | -1/+1 |
2017-06-02 | target/arm: clear PMUVER field of AA64DFR0 when vPMU=off | Wei Huang | 1 | -1/+1 |
2017-05-23 | shutdown: Add source information to SHUTDOWN and RESET | Eric Blake | 1 | -2/+2 |
2017-05-11 | virt-arm: add node-id property to CPU | Igor Mammedov | 1 | -0/+1 |
2017-05-11 | hw/arm/virt: extract mp-affinity calculation in separate function | Igor Mammedov | 2 | -3/+11 |
2017-04-20 | arm: Remove workarounds for old M-profile exception return implementation | Peter Maydell | 2 | -49/+2 |
2017-04-20 | arm: Implement M profile exception return properly | Peter Maydell | 2 | -6/+64 |
2017-04-20 | arm: Track M profile handler mode state in TB flags | Peter Maydell | 3 | -0/+11 |
2017-04-20 | arm: Abstract out "are we singlestepping" test to utility function | Peter Maydell | 1 | -5/+15 |
2017-04-20 | arm: Move condition-failed codepath generation out of if() | Peter Maydell | 1 | -13/+11 |