Age | Commit message (Expand) | Author | Files | Lines |
2017-11-13 | arm/translate-a64: mark path as unreachable to eliminate warning | Emilio G. Cota | 1 | -0/+2 |
2017-11-09 | disas: Dump insn bytes along with capstone disassembly | Richard Henderson | 1 | -0/+6 |
2017-11-07 | translate.c: Fix usermode big-endian AArch32 LDREXD and STREXD | Peter Maydell | 1 | -5/+34 |
2017-11-07 | arm: implement cache/shareability attribute bits for PAR registers | Andrew Baumann | 1 | -14/+164 |
2017-10-31 | fix WFI/WFE length in syndrome register | Stefano Stabellini | 6 | -8/+23 |
2017-10-27 | Merge remote-tracking branch 'remotes/rth/tags/pull-dis-20171026' into staging | Peter Maydell | 3 | -28/+27 |
2017-10-26 | tcg: Avoid setting tcg_initialize if !CONFIG_TCG | Richard Henderson | 1 | -0/+2 |
2017-10-25 | arm: Support Capstone in disas_set_info | Richard Henderson | 1 | -3/+18 |
2017-10-25 | disas: Remove unused flags arguments | Richard Henderson | 2 | -4/+2 |
2017-10-25 | target/arm: Don't set INSN_ARM_BE32 for CONFIG_USER_ONLY | Richard Henderson | 1 | -2/+7 |
2017-10-25 | target/arm: Move BE32 disassembler fixup | Richard Henderson | 1 | -19/+0 |
2017-10-24 | tcg: Initialize cpu_env generically | Richard Henderson | 2 | -5/+0 |
2017-10-24 | tcg: define tcg_init_ctx and make tcg_ctx a pointer | Emilio G. Cota | 1 | -1/+1 |
2017-10-24 | target/arm: check CF_PARALLEL instead of parallel_cpus | Emilio G. Cota | 5 | -21/+68 |
2017-10-24 | tcg: convert tb->cflags reads to tb_cflags(tb) | Emilio G. Cota | 2 | -6/+7 |
2017-10-24 | qom: Introduce CPUClass.tcg_initialize | Richard Henderson | 1 | -5/+1 |
2017-10-12 | target/arm: Implement SG instruction corner cases | Peter Maydell | 1 | -1/+22 |
2017-10-12 | target/arm: Support some Thumb insns being always unconditional | Peter Maydell | 1 | -1/+47 |
2017-10-12 | target-arm: Simplify insn_crosses_page() | Peter Maydell | 1 | -21/+6 |
2017-10-12 | target/arm: Pull Thumb insn word loads up to top level | Peter Maydell | 1 | -70/+108 |
2017-10-12 | target-arm: Don't check for "Thumb2 or M profile" for not-Thumb1 | Peter Maydell | 1 | -2/+1 |
2017-10-12 | target/arm: Implement secure function return | Peter Maydell | 3 | -10/+126 |
2017-10-12 | target/arm: Implement BLXNS | Peter Maydell | 4 | -2/+76 |
2017-10-12 | target/arm: Implement SG instruction | Peter Maydell | 1 | -5/+127 |
2017-10-12 | target/arm: Add M profile secure MMU index values to get_a32_user_mem_index() | Peter Maydell | 1 | -0/+4 |
2017-10-10 | tcg: remove addr argument from lookup_tb_ptr | Emilio G. Cota | 2 | -6/+3 |
2017-10-09 | qom/cpu: move cpu_model null check to cpu_class_by_name() | Philippe Mathieu-Daudé | 1 | -4/+0 |
2017-10-06 | target/arm: Factor out "get mmuidx for specified security state" | Peter Maydell | 1 | -11/+21 |
2017-10-06 | target/arm: Fix calculation of secure mm_idx values | Peter Maydell | 1 | -5/+7 |
2017-10-06 | target/arm: Implement security attribute lookups for memory accesses | Peter Maydell | 2 | -2/+195 |
2017-10-06 | nvic: Implement Security Attribution Unit registers | Peter Maydell | 3 | -0/+51 |
2017-10-06 | target/arm: Add v8M support to exception entry code | Peter Maydell | 1 | -20/+145 |
2017-10-06 | target/arm: Add support for restoring v8M additional state context | Peter Maydell | 1 | -0/+30 |
2017-10-06 | target/arm: Update excret sanity checks for v8M | Peter Maydell | 1 | -15/+58 |
2017-10-06 | target/arm: Add new-in-v8M SFSR and SFAR | Peter Maydell | 2 | -0/+14 |
2017-10-06 | target/arm: Don't warn about exception return with PC low bit set for v8M | Peter Maydell | 1 | -7/+15 |
2017-10-06 | target/arm: Warn about restoring to unaligned stack | Peter Maydell | 1 | -0/+7 |
2017-10-06 | target/arm: Check for xPSR mismatch usage faults earlier for v8M | Peter Maydell | 1 | -3/+27 |
2017-10-06 | target/arm: Restore SPSEL to correct CONTROL register on exception return | Peter Maydell | 1 | -13/+27 |
2017-10-06 | target/arm: Restore security state on exception return | Peter Maydell | 1 | -0/+2 |
2017-10-06 | target/arm: Prepare for CONTROL.SPSEL being nonzero in Handler mode | Peter Maydell | 2 | -23/+50 |
2017-10-06 | target/arm: Don't switch to target stack early in v7M exception return | Peter Maydell | 1 | -32/+98 |
2017-10-06 | arm: Fix SMC reporting to EL2 when QEMU provides PSCI | Jan Kiszka | 2 | -11/+25 |
2017-09-27 | migration: pre_save return int | Dr. David Alan Gilbert | 1 | -1/+3 |
2017-09-23 | Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging | Peter Maydell | 1 | -8/+8 |
2017-09-22 | memory: Get rid of address_space_init_shareable | Alexey Kardashevskiy | 1 | -8/+8 |
2017-09-21 | target/arm: Remove out of date ARM ARM section references in A64 decoder | Peter Maydell | 1 | -113/+114 |
2017-09-21 | nvic: Support banked exceptions in acknowledge and complete | Peter Maydell | 2 | -5/+18 |
2017-09-21 | target/arm: Handle banking in negative-execution-priority check in cpu_mmu_in... | Peter Maydell | 1 | -5/+16 |
2017-09-21 | nvic: Make set_pending and clear_pending take a secure parameter | Peter Maydell | 2 | -11/+27 |