riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2021-06-03	target/arm: Enable BFloat16 extensions	Richard Henderson	3	-0/+7
2021-06-03	target/arm: Implement bfloat widening fma (indexed)	Richard Henderson	7	-1/+82
2021-06-03	target/arm: Implement bfloat widening fma (vector)	Richard Henderson	7	-4/+73
2021-06-03	target/arm: Implement bfloat16 matrix multiply accumulate	Richard Henderson	7	-3/+81
2021-06-03	target/arm: Implement bfloat16 dot product (indexed)	Richard Henderson	7	-9/+80
2021-06-03	target/arm: Implement bfloat16 dot product (vector)	Richard Henderson	7	-0/+89
2021-06-03	target/arm: Implement vector float32 to bfloat16 conversion	Richard Henderson	9	-0/+95
2021-06-03	target/arm: Implement scalar float32 to bfloat16 conversion	Richard Henderson	5	-0/+51
2021-06-03	target/arm: Unify unallocated path in disas_fp_1src	Richard Henderson	1	-9/+6
2021-06-03	target/arm: Add isar_feature_{aa32, aa64, aa64_sve}_bf16	Richard Henderson	1	-0/+15
2021-06-03	target/arm: use raise_exception_ra for stack limit exception	Jamie Iles	2	-10/+4
2021-06-03	target/arm: use raise_exception_ra for MTE check failure	Jamie Iles	1	-9/+3
2021-06-03	target/arm: fold do_raise_exception into raise_exception	Jamie Iles	1	-10/+2
2021-06-03	target/arm: fix missing exception class	Jamie Iles	1	-2/+9
2021-06-03	target/arm: Mark LDS{MIN,MAX} as signed operations	Richard Henderson	1	-3/+10
2021-06-03	target/arm: Allow board models to specify initial NS VTOR	Peter Maydell	2	-0/+12
2021-06-03	target/arm: Make FPSCR.LTPSIZE writable for MVE	Peter Maydell	3	-4/+9
2021-06-03	target/arm: Implement M-profile VPR register	Peter Maydell	3	-0/+63
2021-06-03	target/arm: Fix return values in fp_sysreg_checks()	Peter Maydell	1	-3/+3
2021-06-03	target/arm: Add MVE check to VMOV_reg_sp and VMOV_reg_dp	Peter Maydell	1	-2/+13
2021-06-03	target/arm: Move fpsp/fpdp isar check into callers of do_vfp_2op_sp/dp	Peter Maydell	1	-18/+19
2021-06-03	target/arm: Update feature checks for insns which are "MVE or FP"	Peter Maydell	1	-19/+29
2021-06-03	target/arm: Add isar feature check functions for MVE	Peter Maydell	1	-0/+22
2021-06-02	docs: fix references to docs/devel/tracing.rst	Stefano Garzarella	1	-1/+1
2021-05-26	hw/core: Constify TCGCPUOps	Richard Henderson	2	-2/+2
2021-05-26	cpu: Move CPUClass::get_phys_page_debug to SysemuCPUOps	Philippe Mathieu-Daudé	1	-1/+1
2021-05-26	cpu: Move CPUClass::asidx_from_attrs to SysemuCPUOps	Philippe Mathieu-Daudé	1	-1/+1
2021-05-26	cpu: Move CPUClass::write_elf* to SysemuCPUOps	Philippe Mathieu-Daudé	1	-2/+2
2021-05-26	cpu: Move CPUClass::virtio_is_big_endian to SysemuCPUOps	Philippe Mathieu-Daudé	1	-1/+1
2021-05-26	cpu: Move CPUClass::vmsd to SysemuCPUOps	Philippe Mathieu-Daudé	1	-1/+1
2021-05-26	cpu: Introduce SysemuCPUOps structure	Philippe Mathieu-Daudé	1	-0/+8
2021-05-26	cpu: Rename CPUClass vmsd -> legacy_vmsd	Philippe Mathieu-Daudé	1	-1/+1
2021-05-25	target/arm: Enable SVE2 and related extensions	Richard Henderson	3	-0/+16
2021-05-25	target/arm: Implement integer matrix multiply accumulate	Richard Henderson	7	-0/+169
2021-05-25	target/arm: Implement aarch32 VSUDOT, VUSDOT	Richard Henderson	3	-0/+38
2021-05-25	target/arm: Split decode of VSDOT and VUDOT	Richard Henderson	2	-11/+28
2021-05-25	target/arm: Split out do_neon_ddda	Richard Henderson	1	-52/+38
2021-05-25	target/arm: Fix decode for VDOT (indexed)	Richard Henderson	2	-3/+3
2021-05-25	target/arm: Remove unused fpst from VDOT_scalar	Richard Henderson	1	-3/+0
2021-05-25	target/arm: Split out do_neon_ddda_fpst	Richard Henderson	1	-55/+43
2021-05-25	target/arm: Implement aarch64 SUDOT, USDOT	Richard Henderson	2	-0/+30
2021-05-25	target/arm: Implement SVE2 fp multiply-add long	Stephen Long	4	-0/+141
2021-05-25	target/arm: Move endian adjustment macros to vec_internal.h	Richard Henderson	3	-28/+24
2021-05-25	target/arm: Implement SVE2 bitwise shift immediate	Stephen Long	4	-0/+133
2021-05-25	target/arm: Implement 128-bit ZIP, UZP, TRN	Richard Henderson	4	-8/+90
2021-05-25	target/arm: Implement SVE2 LD1RO	Richard Henderson	2	-0/+97
2021-05-25	target/arm: Tidy do_ldrq	Richard Henderson	1	-9/+4
2021-05-25	target/arm: Share table of sve load functions	Richard Henderson	1	-128/+126
2021-05-25	target/arm: Implement SVE2 FLOGB	Stephen Long	4	-0/+119
2021-05-25	target/arm: Implement SVE2 FCVTXNT, FCVTX	Stephen Long	2	-10/+41