riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2022-10-26	accel/tcg: Simplify page_get/alloc_target_data	Richard Henderson	1	-4/+0
2022-10-26	accel/tcg: Make page_alloc_target_data allocation constant	Richard Henderson	3	-6/+9
2022-10-20	target/arm: Enable TARGET_TB_PCREL	Richard Henderson	6	-71/+178
2022-10-20	target/arm: Introduce gen_pc_plus_diff for aarch32	Richard Henderson	1	-17/+21
2022-10-20	target/arm: Introduce gen_pc_plus_diff for aarch64	Richard Henderson	1	-12/+29
2022-10-20	target/arm: Change gen_jmp* to work on displacements	Richard Henderson	1	-16/+21
2022-10-20	target/arm: Remove gen_exception_internal_insn pc argument	Richard Henderson	2	-8/+8
2022-10-20	target/arm: Change gen_exception_insn* to work on displacements	Richard Henderson	6	-46/+43
2022-10-20	target/arm: Change gen_set_pc_im to gen_update_pc	Richard Henderson	5	-54/+56
2022-10-20	target/arm: Change gen_goto_tb to work on displacements	Richard Henderson	2	-23/+27
2022-10-20	target/arm: Introduce curr_insn_len	Richard Henderson	3	-4/+8
2022-10-20	target/arm: Use bool consistently for get_phys_addr subroutines	Richard Henderson	1	-4/+3
2022-10-20	target/arm: Split out get_phys_addr_twostage	Richard Henderson	1	-91/+100
2022-10-20	target/arm: Use softmmu tlbs for page table walking	Richard Henderson	3	-75/+145
2022-10-20	target/arm: Move be test for regime into S1TranslateResult	Richard Henderson	1	-2/+4
2022-10-20	target/arm: Plumb debug into S1Translate	Richard Henderson	1	-18/+37
2022-10-20	target/arm: Split out S1Translate type	Richard Henderson	1	-61/+79
2022-10-20	target/arm: Restrict tlb flush from vttbr_write to vmid change	Richard Henderson	1	-2/+2
2022-10-20	target/arm: Move ARMMMUIdx_Stage2 to a real tlb mmu_idx	Richard Henderson	3	-49/+127
2022-10-20	target/arm: Add ARMMMUIdx_Phys_{S,NS}	Richard Henderson	3	-4/+24
2022-10-20	target/arm: Use probe_access_full for BTI	Richard Henderson	5	-31/+20
2022-10-20	target/arm: Use probe_access_full for MTE	Richard Henderson	5	-86/+36
2022-10-20	target/arm: Enable TARGET_PAGE_ENTRY_EXTRA	Richard Henderson	2	-0/+15
2022-10-20	target/arm: update the cortex-a15 MIDR to latest rev	Alex Bennée	1	-1/+3
2022-10-13	Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging	Stefan Hajnoczi	1	-0/+4
2022-10-12	Merge tag 'pull-target-arm-20221010' of https://git.linaro.org/people/pmaydel...	Stefan Hajnoczi	10	-584/+710
2022-10-10	target/arm: Use ARMGranuleSize in ARMVAParameters	Peter Maydell	3	-20/+50
2022-10-10	target/arm: Don't allow guest to use unimplemented granule sizes	Peter Maydell	3	-8/+136
2022-10-10	target/arm: Use tlb_set_page_full	Richard Henderson	5	-114/+111
2022-10-10	target/arm: Fix cacheattr in get_phys_addr_disabled	Richard Henderson	1	-23/+25
2022-10-10	target/arm: Split out get_phys_addr_disabled	Richard Henderson	1	-64/+74
2022-10-10	target/arm: Fix ATS12NSO* from S PL1	Richard Henderson	1	-4/+4
2022-10-10	target/arm: Pass HCR to attribute subroutines.	Richard Henderson	1	-13/+17
2022-10-10	target/arm: Remove env argument from combined_attrs_fwb	Richard Henderson	1	-3/+2
2022-10-10	target/arm: Hoist read of *is_secure in S1_ptw_translate	Richard Henderson	1	-10/+12
2022-10-10	target/arm: Introduce arm_hcr_el2_eff_secstate	Richard Henderson	2	-10/+21
2022-10-10	target/arm: Drop secure check for HCR.TGE vs SCTLR_EL1.M	Richard Henderson	1	-2/+2
2022-10-10	target/arm: Reorg regime_translation_disabled	Richard Henderson	1	-7/+25
2022-10-10	target/arm: Fold secure and non-secure a-profile mmu indexes	Richard Henderson	7	-203/+85
2022-10-10	target/arm: Add is_secure parameter to do_ats_write	Richard Henderson	1	-5/+14
2022-10-10	target/arm: Merge regime_is_secure into get_phys_addr	Richard Henderson	2	-44/+42
2022-10-10	target/arm: Add TBFLAG_M32.SECURE	Richard Henderson	3	-2/+7
2022-10-10	target/arm: Add is_secure parameter to v7m_read_half_insn	Richard Henderson	1	-5/+4
2022-10-10	target/arm: Split out get_phys_addr_with_secure	Richard Henderson	2	-29/+55
2022-10-10	target/arm: Add is_secure parameter to regime_translation_disabled	Richard Henderson	1	-9/+11
2022-10-10	target/arm: Fix S2 disabled check in S1_ptw_translate	Richard Henderson	1	-3/+3
2022-10-10	target/arm: Add is_secure parameter to get_phys_addr_lpae	Richard Henderson	1	-10/+10
2022-10-10	target/arm: Make the final stage1+2 write to secure be unconditional	Richard Henderson	1	-11/+10
2022-10-10	target/arm: Split s2walk_secure from ipa_secure in get_phys_addr	Richard Henderson	1	-9/+9
2022-10-10	target/arm: allow setting SCR_EL3.EnTP2 when FEAT_SME is implemented	Jerome Forissier	2	-28/+31