riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2020-02-21	target/arm: Correct handling of PMCR_EL0.LC bit	Peter Maydell	1	-4/+9
2020-02-21	target/arm: Correct definition of PMCRDP	Peter Maydell	1	-1/+2
2020-02-21	target/arm: Provide ARMv8.4-PMU in '-cpu max'	Peter Maydell	1	-0/+8
2020-02-21	target/arm: Implement ARMv8.4-PMU extension	Peter Maydell	2	-1/+39
2020-02-21	target/arm: Implement ARMv8.1-PMU extension	Peter Maydell	1	-2/+30
2020-02-21	target/arm: Read debug-related ID registers from KVM	Peter Maydell	3	-0/+49
2020-02-21	target/arm: Move DBGDIDR into ARMISARegisters	Peter Maydell	5	-12/+12
2020-02-21	target/arm: Stop assuming DBGDIDR always exists	Peter Maydell	4	-19/+57
2020-02-21	target/arm: Add _aa64_ and _any_ versions of pmu_8_1 isar checks	Peter Maydell	4	-11/+25
2020-02-21	target/arm: Define an aa32_pmu_8_1 isar feature test function	Peter Maydell	4	-21/+27
2020-02-21	target/arm: Use FIELD macros for clearing ID_DFR0 PERFMON field	Peter Maydell	1	-1/+1
2020-02-21	target/arm: Add and use FIELD definitions for ID_AA64DFR0_EL1	Peter Maydell	3	-4/+14
2020-02-21	target/arm: Factor out PMU register definitions	Peter Maydell	1	-76/+82
2020-02-21	target/arm: Define and use any_predinv isar_feature test	Peter Maydell	2	-8/+6
2020-02-21	target/arm: Add isar_feature_any_fp16 and document naming/usage conventions	Peter Maydell	2	-2/+19
2020-02-21	target/arm: Check aa32_pan in take_aarch32_exception(), not aa64_pan	Peter Maydell	1	-1/+1
2020-02-21	target/arm: Add _aa32_ to isar_feature functions testing 32-bit ID registers	Peter Maydell	5	-10/+19
2020-02-21	target/arm: Split out aa64_va_parameter_tbi, aa64_va_parameter_tbid	Richard Henderson	2	-34/+37
2020-02-21	target/arm: Remove ttbr1_valid check from get_phys_addr_lpae	Richard Henderson	1	-5/+1
2020-02-21	target/arm: Fix select for aa64_va_parameters_both	Richard Henderson	1	-22/+24
2020-02-21	target/arm: Use bit 55 explicitly for pauth	Richard Henderson	1	-1/+2
2020-02-21	target/arm: Flush high bits of sve register after AdvSIMD INS	Richard Henderson	1	-0/+6
2020-02-21	target/arm: Flush high bits of sve register after AdvSIMD ZIP/UZP/TRN	Richard Henderson	1	-0/+1
2020-02-21	target/arm: Flush high bits of sve register after AdvSIMD TBL/TBX	Richard Henderson	1	-0/+1
2020-02-21	target/arm: Flush high bits of sve register after AdvSIMD EXT	Richard Henderson	1	-0/+1
2020-02-13	target/arm: Implement ARMv8.1-VMID16 extension	Peter Maydell	1	-0/+1
2020-02-13	target/arm: Enable ARMv8.2-UAO in -cpu max	Richard Henderson	1	-0/+4
2020-02-13	target/arm: Implement UAO semantics	Richard Henderson	1	-20/+21
2020-02-13	target/arm: Update MSR access to UAO	Richard Henderson	4	-0/+44
2020-02-13	target/arm: Add ID_AA64MMFR2_EL1	Richard Henderson	3	-2/+21
2020-02-13	target/arm: Enable ARMv8.2-ATS1E1 in -cpu max	Richard Henderson	2	-0/+9
2020-02-13	target/arm: Implement ATS1E1 system registers	Richard Henderson	1	-6/+50
2020-02-13	target/arm: Set PAN bit as required on exception entry	Richard Henderson	1	-3/+50
2020-02-13	target/arm: Enforce PAN semantics in get_S1prot	Richard Henderson	2	-0/+16
2020-02-13	target/arm: Update arm_mmu_idx_el for PAN	Richard Henderson	1	-0/+9
2020-02-13	target/arm: Update MSR access for PAN	Richard Henderson	4	-0/+43
2020-02-13	target/arm: Introduce aarch64_pstate_valid_mask	Richard Henderson	2	-0/+13
2020-02-13	target/arm: Remove CPSR_RESERVED	Richard Henderson	2	-7/+8
2020-02-13	target/arm: Use aarch32_cpsr_valid_mask in helper_exception_return	Richard Henderson	1	-2/+3
2020-02-13	target/arm: Replace CPSR_ERET_MASK with aarch32_cpsr_valid_mask	Richard Henderson	2	-3/+4
2020-02-13	target/arm: Mask CPSR_J when Jazelle is not enabled	Richard Henderson	1	-1/+4
2020-02-13	target/arm: Split out aarch32_cpsr_valid_mask	Richard Henderson	2	-23/+38
2020-02-13	target/arm: Move LOR regdefs to file scope	Richard Henderson	1	-28/+29
2020-02-13	target/arm: Add isar_feature tests for PAN + ATS1E1	Richard Henderson	1	-0/+29
2020-02-13	target/arm: Add mmu_idx for EL1 and EL2 w/ PAN enabled	Richard Henderson	6	-22/+87
2020-02-13	target/arm: Add arm_mmu_idx_is_stage1_of_2	Richard Henderson	2	-5/+21
2020-02-07	target/arm: Raise only one interrupt in arm_cpu_exec_interrupt	Richard Henderson	1	-18/+12
2020-02-07	target/arm: Use bool for unmasked in arm_excp_unmasked	Richard Henderson	1	-3/+3
2020-02-07	target/arm: Pass more cpu state to arm_excp_unmasked	Richard Henderson	1	-10/+12
2020-02-07	target/arm: Move arm_excp_unmasked to cpu.c	Richard Henderson	2	-111/+119