riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2018-10-08	target/arm: Add v8M stack checks for MSR to SP_NS	Peter Maydell	1	-1/+13
2018-10-08	target/arm: Add v8M stack checks for VLDM/VSTM	Peter Maydell	1	-0/+12
2018-10-08	target/arm: Add v8M stack checks for Thumb push/pop	Peter Maydell	1	-1/+15
2018-10-08	target/arm: Add v8M stack checks for T32 load/store single	Peter Maydell	1	-1/+22
2018-10-08	target/arm: Add v8M stack checks for Thumb2 LDM/STM	Peter Maydell	1	-1/+18
2018-10-08	target/arm: Add v8M stack checks for LDRD/STRD (imm)	Peter Maydell	1	-2/+25
2018-10-08	target/arm: Add v8M stack limit checks on NS function calls	Peter Maydell	3	-2/+15
2018-10-08	target/arm: Add v8M stack checks on exception entry	Peter Maydell	1	-8/+46
2018-10-08	target/arm: Add some comments in Thumb decode	Peter Maydell	1	-3/+17
2018-10-08	target/arm: Add v8M stack checks on ADD/SUB/MOV of SP	Peter Maydell	4	-9/+106
2018-10-08	target/arm: Move v7m_using_psp() to internals.h	Peter Maydell	2	-12/+16
2018-10-08	target/arm: Define new EXCP type for v8M stack overflows	Peter Maydell	2	-0/+7
2018-10-08	target/arm: Define new TBFLAG for v8M stack checking	Peter Maydell	4	-0/+19
2018-10-08	target/arm: Pass TCGMemOpIdx to sve memory helpers	Richard Henderson	3	-89/+121
2018-10-08	target/arm: Rewrite vector gather first-fault loads	Richard Henderson	3	-141/+325
2018-10-08	target/arm: Rewrite vector gather stores	Richard Henderson	3	-90/+179
2018-10-08	target/arm: Rewrite vector gather loads	Richard Henderson	3	-173/+392
2018-10-08	target/arm: Split contiguous stores for endianness	Richard Henderson	3	-37/+98
2018-10-08	target/arm: Split contiguous loads for endianness	Richard Henderson	3	-142/+263
2018-10-08	target/arm: Rewrite helper_sve_st[1234]*_r	Richard Henderson	1	-177/+170
2018-10-08	target/arm: Rewrite helper_sve_ld[234]*_r	Richard Henderson	1	-93/+117
2018-10-08	target/arm: Rewrite helper_sve_ld1*_r using pages	Richard Henderson	1	-164/+571
2018-10-08	target/arm: Clear unused predicate bits for LD1RQ	Richard Henderson	1	-1/+22
2018-10-08	target/arm: Adjust aarch64_cpu_dump_state for system mode SVE	Richard Henderson	3	-5/+13
2018-10-08	target/arm: Handle SVE vector length changes in system mode	Richard Henderson	4	-55/+125
2018-10-08	target/arm: Pass in current_el to fp and sve_exception_el	Richard Henderson	1	-12/+9
2018-10-08	target/arm: Adjust sve_exception_el	Richard Henderson	1	-46/+42
2018-10-08	target/arm: Define ID_AA64ZFR0_EL1	Richard Henderson	1	-1/+2
2018-10-08	target/arm: Don't read r4 from v8M exception stackframe twice	Peter Maydell	1	-1/+0
2018-10-08	target/arm: Correct condition for v8M callee stack push	Peter Maydell	1	-1/+1
2018-10-08	target/arm: fix code comments error	Dongjiu Geng	2	-3/+3
2018-09-25	target/arm: Start AArch32 CPUs with EL2 but not EL3 in Hyp mode	Peter Maydell	1	-2/+12
2018-09-25	target/arm: Fix cpu_get_tb_cpu_state() for non-SVE CPUs	Richard Henderson	1	-21/+24
2018-08-24	target/arm: Remove a handful of stray tabs	Peter Maydell	2	-9/+9
2018-08-24	target/arm: Untabify iwmmxt_helper.c	Peter Maydell	1	-117/+117
2018-08-24	target/arm: Untabify translate.c	Peter Maydell	1	-61/+61
2018-08-24	target/arm: Clear CPSR.IL and CPSR.J on 32-bit exception entry	Peter Maydell	1	-0/+2
2018-08-24	target/arm: Implement support for taking exceptions to Hyp mode	Peter Maydell	1	-0/+82
2018-08-24	target/arm: Factor out code for taking an AArch32 exception	Peter Maydell	1	-23/+41
2018-08-24	target/arm: Implement AArch32 HCR and HCR2	Peter Maydell	1	-4/+50
2018-08-24	target/arm: Implement RAZ/WI HACTLR2	Peter Maydell	1	-0/+10
2018-08-24	target/arm: Use the float-to-int-scale softfloat routines	Richard Henderson	1	-48/+49
2018-08-24	target/arm: Use the int-to-float-scale softfloat routines	Richard Henderson	1	-24/+5
2018-08-23	fix "Missing break in switch" coverity reports	Paolo Bonzini	1	-0/+1
2018-08-20	target/arm: Implement AArch32 ERET instruction	Peter Maydell	1	-2/+29
2018-08-20	target/arm: Permit accesses to ELR_Hyp from Hyp mode via MSR/MRS (banked)	Peter Maydell	2	-14/+18
2018-08-20	target/arm: Implement ESR_EL2/HSR for AArch32 and no-EL2	Peter Maydell	1	-1/+5
2018-08-20	target/arm: Implement AArch32 Hyp FARs	Peter Maydell	1	-1/+13
2018-08-20	target/arm: Implement AArch32 HVBAR	Peter Maydell	1	-2/+2
2018-08-20	target/arm: Add missing .cp = 15 to HMAIR1 and HAMAIR1 regdefs	Peter Maydell	1	-4/+4