| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2021-08-25 | target/arm: Implement MVE VMULL (polynomial) | Peter Maydell | 1 | -1/+13 |
| 2021-06-16 | target/arm: Move expand_pred_b() data to vec_helper.c | Peter Maydell | 1 | -0/+102 |
| 2021-06-16 | target/arm: Provide and use H8 and H1_8 macros | Peter Maydell | 1 | -7/+7 |
| 2021-06-03 | target/arm: Implement bfloat widening fma (indexed) | Richard Henderson | 1 | -0/+22 |
| 2021-06-03 | target/arm: Implement bfloat widening fma (vector) | Richard Henderson | 1 | -0/+16 |
| 2021-06-03 | target/arm: Implement bfloat16 matrix multiply accumulate | Richard Henderson | 1 | -1/+41 |
| 2021-06-03 | target/arm: Implement bfloat16 dot product (indexed) | Richard Henderson | 1 | -0/+20 |
| 2021-06-03 | target/arm: Implement bfloat16 dot product (vector) | Richard Henderson | 1 | -0/+40 |
| 2021-05-25 | target/arm: Implement integer matrix multiply accumulate | Richard Henderson | 1 | -0/+77 |
| 2021-05-25 | target/arm: Implement SVE2 fp multiply-add long | Stephen Long | 1 | -0/+47 |
| 2021-05-25 | target/arm: Move endian adjustment macros to vec_internal.h | Richard Henderson | 1 | -12/+0 |
| 2021-05-25 | target/arm: Implement SVE mixed sign dot product | Richard Henderson | 1 | -0/+1 |
| 2021-05-25 | target/arm: Implement SVE mixed sign dot product (indexed) | Richard Henderson | 1 | -0/+2 |
| 2021-05-25 | target/arm: Macroize helper_gvec_{s,u}dot_idx_{b,h} | Richard Henderson | 1 | -131/+29 |
| 2021-05-25 | target/arm: Macroize helper_gvec_{s,u}dot_{b,h} | Richard Henderson | 1 | -64/+22 |
| 2021-05-25 | target/arm: Implement SVE2 saturating multiply high (indexed) | Richard Henderson | 1 | -0/+88 |
| 2021-05-25 | target/arm: Implement SVE2 signed saturating doubling multiply high | Richard Henderson | 1 | -0/+84 |
| 2021-05-25 | target/arm: Pass separate addend to FCMLA helpers | Richard Henderson | 1 | -30/+20 |
| 2021-05-25 | target/arm: Pass separate addend to {U, S}DOT helpers | Richard Henderson | 1 | -53/+67 |
| 2021-05-25 | target/arm: Use correct output type for gvec_sdot_*_b | Richard Henderson | 1 | -4/+4 |
| 2021-05-25 | target/arm: Implement SVE2 XAR | Richard Henderson | 1 | -0/+12 |
| 2021-05-25 | target/arm: Implement SVE2 complex integer multiply-add | Richard Henderson | 1 | -8/+7 |
| 2021-05-25 | target/arm: Implement SVE2 saturating multiply-add high | Richard Henderson | 1 | -6/+155 |
| 2021-05-25 | target/arm: Implement SVE2 PMULLB, PMULLT | Richard Henderson | 1 | -0/+24 |
| 2021-05-25 | target/arm: Implement SVE2 Integer Multiply - Unpredicated | Richard Henderson | 1 | -0/+96 |
| 2021-03-05 | target/arm: Speed up aarch64 TBL/TBX | Richard Henderson | 1 | -0/+48 |
| 2020-11-15 | arm tcg cpus: Fix Lesser GPL version number | Chetan Pant | 1 | -1/+1 |
| 2020-11-02 | target/arm: Fix VUDOT/VSDOT (scalar) on big-endian hosts | Peter Maydell | 1 | -2/+2 |
| 2020-11-02 | target/arm: Fix float16 pairwise Neon ops on big-endian hosts | Peter Maydell | 1 | -4/+4 |
| 2020-09-01 | target/arm/vec_helper: Add gvec fp indexed multiply-and-add operations | Peter Maydell | 1 | -5/+22 |
| 2020-09-01 | target/arm/vec_helper: Handle oprsz less than 16 bytes in indexed operations | Peter Maydell | 1 | -4/+8 |
| 2020-09-01 | target/arm: Implement fp16 for Neon VRINTX | Peter Maydell | 1 | -0/+3 |
| 2020-09-01 | target/arm: Implement fp16 for Neon VRINT-with-specified-rounding-mode | Peter Maydell | 1 | -0/+21 |
| 2020-09-01 | target/arm: Implement fp16 for Neon VCVT with rounding modes | Peter Maydell | 1 | -0/+23 |
| 2020-09-01 | target/arm: Implement fp16 for Neon VCVT fixed-point | Peter Maydell | 1 | -0/+4 |
| 2020-09-01 | target/arm: Convert Neon VCVT fixed-point to gvec | Peter Maydell | 1 | -0/+20 |
| 2020-09-01 | target/arm: Implement fp16 for Neon float-integer VCVT | Peter Maydell | 1 | -0/+29 |
| 2020-09-01 | target/arm: Implement fp16 for Neon pairwise fp ops | Peter Maydell | 1 | -0/+45 |
| 2020-09-01 | target/arm: Implement fp16 for Neon VRSQRTS | Peter Maydell | 1 | -0/+30 |
| 2020-09-01 | target/arm: Implement fp16 for Neon VRECPS | Peter Maydell | 1 | -0/+31 |
| 2020-09-01 | target/arm: Implement fp16 for Neon fp compare-vs-0 | Peter Maydell | 1 | -0/+25 |
| 2020-09-01 | target/arm: Implement fp16 for Neon VFMA, VMFS | Peter Maydell | 1 | -1/+32 |
| 2020-09-01 | target/arm: Implement fp16 for Neon VMLA, VMLS operations | Peter Maydell | 1 | -0/+42 |
| 2020-09-01 | target/arm: Implement fp16 for Neon VMAXNM, VMINNM | Peter Maydell | 1 | -0/+6 |
| 2020-09-01 | target/arm: Implement fp16 for Neon VMAX, VMIN | Peter Maydell | 1 | -0/+6 |
| 2020-09-01 | target/arm: Implement fp16 for VACGE, VACGT | Peter Maydell | 1 | -0/+26 |
| 2020-09-01 | target/arm: Implement fp16 for VCEQ, VCGE, VCGT comparisons | Peter Maydell | 1 | -0/+44 |
| 2020-09-01 | target/arm: Implement FP16 for Neon VADD, VSUB, VABD, VMUL | Peter Maydell | 1 | -0/+6 |
| 2020-08-28 | target/arm: Convert sq{, r}dmulh to gvec for aa64 advsimd | Richard Henderson | 1 | -0/+48 |
| 2020-08-28 | target/arm: Convert integer multiply-add (indexed) to gvec for aa64 advsimd | Richard Henderson | 1 | -0/+25 |
