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path: root/target/arm/translate.c
AgeCommit message (Expand)AuthorFilesLines
2022-06-10target/arm: Remove default_exception_elRichard Henderson1-5/+0
2022-06-10target/arm: Introduce helper_exception_with_syndromeRichard Henderson1-5/+13
2022-06-10target/arm: Introduce gen_exception_el_vRichard Henderson1-5/+8
2022-06-10target/arm: Introduce gen_exceptionRichard Henderson1-4/+7
2022-06-10target/arm: Rename gen_exception to gen_exception_elRichard Henderson1-9/+9
2022-06-10target/arm: Move gen_exception to translate.cRichard Henderson1-0/+7
2022-06-10target/arm: Remove TBFLAG_ANY.DEBUG_TARGET_ELRichard Henderson1-1/+0
2022-06-10target/arm: Introduce gen_exception_insnRichard Henderson1-16/+13
2022-06-10target/arm: Rename gen_exception_insn to gen_exception_insn_elRichard Henderson1-19/+20
2022-06-10target/arm: Introduce gen_exception_insn_el_vRichard Henderson1-15/+12
2022-06-10target/arm: Rename helper_exception_with_syndromeRichard Henderson1-3/+3
2022-05-09target/arm: Implement ESB instructionRichard Henderson1-0/+23
2022-05-05target/arm: Avoid bare abort() or assert(0)Richard Henderson1-2/+2
2022-05-05target/arm: Reorg ARMCPRegInfo type field bitsRichard Henderson1-2/+4
2022-05-05target/arm: Split out cpregs.hRichard Henderson1-2/+1
2022-04-28target/arm: Use tcg_constant in trans_CSELRichard Henderson1-4/+3
2022-04-28target/arm: Use tcg_constant in trans_CPS_v7mRichard Henderson1-6/+3
2022-04-28target/arm: Use tcg_constant in CLRM, DLS, WLS, LERichard Henderson1-11/+5
2022-04-28target/arm: Use tcg_constant in LDM, STMRichard Henderson1-8/+4
2022-04-28target/arm: Use tcg_constant for TT, SAT, SMMLARichard Henderson1-9/+5
2022-04-28target/arm: Use tcg_constant for v7m MRS, MSRRichard Henderson1-4/+3
2022-04-28target/arm: Use tcg_constant for MOVW, UMAAL, CRC32Richard Henderson1-8/+3
2022-04-28target/arm: Use tcg_constant for op_s_{rri,rxi}_rotRichard Henderson1-6/+5
2022-04-28target/arm: Use tcg_constant for gen_srsRichard Henderson1-6/+2
2022-04-28target/arm: Use tcg_constant for do_coproc_insnRichard Henderson1-30/+13
2022-04-28target/arm: Use tcg_constant for vector shift expandersRichard Henderson1-18/+9
2022-04-28target/arm: Use tcg_constant for gen_{msr,mrs}Richard Henderson1-13/+9
2022-04-28target/arm: Use tcg_constant for disas_iwmmxt_insnRichard Henderson1-15/+10
2022-04-28target/arm: Use tcg_constant for aa32 exceptionsRichard Henderson1-25/+7
2022-04-22target/arm: Simplify aa32 DISAS_WFIRichard Henderson1-8/+4
2022-04-22target/arm: Simplify gen_sarRichard Henderson1-5/+3
2022-04-22target/arm: Simplify GEN_SHIFT in translate.cRichard Henderson1-10/+8
2022-04-22target/arm: Split out gen_rebuild_hflagsRichard Henderson1-16/+24
2022-04-22target/arm: Extend store_cpu_offset to take field sizeRichard Henderson1-1/+20
2022-04-22target/arm: Change DisasContext.aarch64 to boolRichard Henderson1-1/+1
2022-04-20exec/translator: Pass the locked filepointer to disas_log hookRichard Henderson1-3/+4
2022-04-06Replace config-time define HOST_WORDS_BIGENDIANMarc-André Lureau1-1/+1
2022-01-08exec/memop: Adding signedness to quad definitionsFrédéric Pétrot1-1/+1
2021-12-15target/arm: Assert thumb pc is alignedRichard Henderson1-0/+3
2021-12-15target/arm: Take an exception if PC is misalignedRichard Henderson1-1/+21
2021-12-15target/arm: Split arm_pre_translate_insnRichard Henderson1-3/+7
2021-12-15target/arm: Hoist pc_next to a local variable in thumb_tr_translate_insnRichard Henderson1-8/+8
2021-12-15target/arm: Hoist pc_next to a local variable in arm_tr_translate_insnRichard Henderson1-4/+5
2021-11-02target/arm: Use tcg_constant_i32() in gen_rev16()Philippe Mathieu-Daudé1-2/+1
2021-11-02target/arm: Use the constant variant of store_cpu_field() when possiblePhilippe Mathieu-Daudé1-15/+6
2021-11-02target/arm: Use tcg_constant_i32() in op_smlad()Philippe Mathieu-Daudé1-2/+1
2021-10-15target/arm: Drop checks for singlestep_enabledRichard Henderson1-30/+6
2021-09-21target/arm: Add TB flag for "MVE insns not predicated"Peter Maydell1-0/+8
2021-09-21target/arm: Avoid goto_tb if we're trying to exit to the main loopPeter Maydell1-1/+33
2021-09-14accel/tcg: Add DisasContextBase argument to translator_ld*Ilya Leoshkevich1-4/+5