Age | Commit message (Expand) | Author | Files | Lines |
2019-05-13 | target/arm: Use tcg_gen_abs_i64 and tcg_gen_gvec_abs | Richard Henderson | 1 | -36/+5 |
2019-04-18 | qom/cpu: Simplify how CPUClass:cpu_dump_state() prints | Markus Armbruster | 1 | -41/+41 |
2019-03-25 | target/arm: Fix non-parallel expansion of CASP | Richard Henderson | 1 | -1/+1 |
2019-03-05 | target/arm: Implement ARMv8.5-FRINT | Richard Henderson | 1 | -5/+66 |
2019-03-05 | target/arm: Restructure handle_fp_1src_{single, double} | Richard Henderson | 1 | -41/+49 |
2019-03-05 | target/arm: Implement ARMv8.5-CondM | Richard Henderson | 1 | -0/+58 |
2019-03-05 | target/arm: Implement ARMv8.4-CondM | Richard Henderson | 1 | -1/+98 |
2019-03-05 | target/arm: Rearrange disas_data_proc_reg | Richard Henderson | 1 | -41/+57 |
2019-03-05 | target/arm: Add set/clear_pstate_bits, share gen_ss_advance | Richard Henderson | 1 | -11/+0 |
2019-03-05 | target/arm: Split helper_msr_i_pstate into 3 | Richard Henderson | 1 | -13/+22 |
2019-03-05 | target/arm: Implement ARMv8.0-SB | Richard Henderson | 1 | -0/+14 |
2019-02-28 | target/arm: Implement FMLAL and FMLSL for aarch64 | Richard Henderson | 1 | -1/+48 |
2019-02-21 | target/arm: Implement ARMv8.3-JSConv | Richard Henderson | 1 | -0/+26 |
2019-02-21 | target/arm: Restructure disas_fp_int_conv | Richard Henderson | 1 | -43/+47 |
2019-02-15 | target/arm: Use vector operations for saturation | Richard Henderson | 1 | -20/+16 |
2019-02-15 | target/arm: Use vector minmax expanders for aarch64 | Richard Henderson | 1 | -21/+14 |
2019-02-15 | target/arm: Rely on optimization within tcg_gen_gvec_or | Richard Henderson | 1 | -5/+1 |
2019-02-05 | target/arm: Clean TBI for data operations in the translator | Richard Henderson | 1 | -101/+116 |
2019-02-05 | target/arm: Add TBFLAG_A64_TBID, split out gen_top_byte_ignore | Richard Henderson | 1 | -35/+35 |
2019-02-05 | target/arm: Set btype for indirect branches | Richard Henderson | 1 | -1/+36 |
2019-02-05 | target/arm: Reset btype for direct branches | Richard Henderson | 1 | -0/+6 |
2019-02-05 | target/arm: Default handling of BTYPE during translation | Richard Henderson | 1 | -0/+139 |
2019-02-05 | target/arm: Add BT and BTYPE to tb->flags | Richard Henderson | 1 | -0/+2 |
2019-02-05 | target/arm: Add PSTATE.BTYPE | Richard Henderson | 1 | -0/+3 |
2019-02-01 | target/arm: fix decoding of B{,L}RA{A,B} | Remi Denis-Courmont | 1 | -1/+1 |
2019-02-01 | target/arm/translate-a64: Fix mishandling of size in FCMLA decode | Peter Maydell | 1 | -1/+1 |
2019-02-01 | target/arm/translate-a64: Fix FCMLA decoding error | Peter Maydell | 1 | -1/+1 |
2019-02-01 | target/arm/translate-a64: Don't underdecode SDOT and UDOT | Peter Maydell | 1 | -1/+1 |
2019-02-01 | target/arm/translate-a64: Don't underdecode FP insns | Peter Maydell | 1 | -1/+21 |
2019-02-01 | target/arm/translate-a64: Don't underdecode add/sub extended register | Peter Maydell | 1 | -1/+2 |
2019-02-01 | target/arm/translate-a64: Don't underdecode SIMD ld/st single | Peter Maydell | 1 | -1/+10 |
2019-02-01 | target/arm/translate-a64: Don't underdecode SIMD ld/st multiple | Peter Maydell | 1 | -1/+6 |
2019-02-01 | target/arm/translate-a64: Don't underdecode PRFM | Peter Maydell | 1 | -1/+1 |
2019-02-01 | target/arm/translate-a64: Don't underdecode system instructions | Peter Maydell | 1 | -1/+5 |
2019-01-21 | target/arm: Tidy TBI handling in gen_a64_set_pc | Richard Henderson | 1 | -43/+23 |
2019-01-21 | target/arm: Merge TBFLAG_AA_TB{0, 1} to TBII | Richard Henderson | 1 | -6/+7 |
2019-01-21 | target/arm: Decode Load/store register (pac) | Richard Henderson | 1 | -0/+61 |
2019-01-21 | target/arm: Decode PAuth within disas_uncond_b_reg | Richard Henderson | 1 | -1/+81 |
2019-01-21 | target/arm: Rearrange decode in disas_uncond_b_reg | Richard Henderson | 1 | -11/+36 |
2019-01-21 | target/arm: Add new_pc argument to helper_exception_return | Richard Henderson | 1 | -1/+6 |
2019-01-21 | target/arm: Decode PAuth within disas_data_proc_2src | Richard Henderson | 1 | -0/+8 |
2019-01-21 | target/arm: Decode PAuth within disas_data_proc_1src | Richard Henderson | 1 | -0/+146 |
2019-01-21 | target/arm: Rearrange decode in disas_data_proc_1src | Richard Henderson | 1 | -9/+22 |
2019-01-21 | target/arm: Decode PAuth within system hint space | Richard Henderson | 1 | -12/+81 |
2019-01-21 | target/arm: Add PAuth active bit to tbflags | Richard Henderson | 1 | -0/+1 |
2019-01-07 | target/arm: Convert ARM_TBFLAG_* to FIELDs | Richard Henderson | 1 | -10/+12 |
2018-12-13 | target/arm: Implement the ARMv8.1-LOR extension | Richard Henderson | 1 | -0/+12 |
2018-11-06 | target/arm: Remove can't-happen if() from handle_vec_simd_shli() | Peter Maydell | 1 | -5/+3 |
2018-10-24 | target/arm: Use gvec for NEON_3R_VTST_VCEQ, NEON_3R_VCGT, NEON_3R_VCGE | Richard Henderson | 1 | -38/+0 |
2018-10-24 | target/arm: Use gvec for NEON_3R_VML | Richard Henderson | 1 | -106/+0 |