Age | Commit message (Expand) | Author | Files | Lines |
2021-12-15 | target/arm: Take an exception if PC is misaligned | Richard Henderson | 1 | -0/+18 |
2021-12-15 | target/arm: Split compute_fsr_fsc out of arm_deliver_fault | Richard Henderson | 1 | -17/+28 |
2021-11-02 | target/arm: Implement arm_cpu_record_sigbus | Richard Henderson | 1 | -0/+6 |
2021-11-02 | target/arm: Implement arm_cpu_record_sigsegv | Richard Henderson | 1 | -17/+19 |
2021-03-23 | target/arm: Set ARMMMUFaultInfo.level in user-only arm_cpu_tlb_fill | Richard Henderson | 1 | -0/+1 |
2021-02-16 | linux-user/aarch64: Pass syndrome to EXC_*_ABORT | Richard Henderson | 1 | -6/+9 |
2021-01-19 | target/arm: set HPFAR_EL2.NS on secure stage 2 faults | Rémi Denis-Courmont | 1 | -0/+3 |
2020-06-26 | target/arm: Cache the Tagged bit for a page in MemTxAttrs | Richard Henderson | 1 | -0/+5 |
2020-06-26 | target/arm: Always pass cacheattr to get_phys_addr | Richard Henderson | 1 | -1/+3 |
2020-06-26 | target/arm: Define arm_cpu_do_unaligned_access for user-only | Richard Henderson | 1 | -2/+2 |
2020-05-14 | target-arm: kvm64: handle SIGBUS signal from kernel or KVM | Dongjiu Geng | 1 | -1/+1 |
2020-01-17 | target/arm: Return correct IL bit in merge_syn_data_abort | Jeff Kubascik | 1 | -1/+1 |
2019-07-01 | target/arm: Move TLB related routines to tlb_helper.c | Philippe Mathieu-Daudé | 1 | -0/+200 |