riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2022-10-20	target/arm: Use bool consistently for get_phys_addr subroutines	Richard Henderson	1	-4/+3
2022-10-20	target/arm: Split out get_phys_addr_twostage	Richard Henderson	1	-91/+100
2022-10-20	target/arm: Use softmmu tlbs for page table walking	Richard Henderson	1	-72/+126
2022-10-20	target/arm: Move be test for regime into S1TranslateResult	Richard Henderson	1	-2/+4
2022-10-20	target/arm: Plumb debug into S1Translate	Richard Henderson	1	-18/+37
2022-10-20	target/arm: Split out S1Translate type	Richard Henderson	1	-61/+79
2022-10-20	target/arm: Add ARMMMUIdx_Phys_{S,NS}	Richard Henderson	1	-2/+17
2022-10-20	target/arm: Use probe_access_full for BTI	Richard Henderson	1	-3/+4
2022-10-10	target/arm: Use ARMGranuleSize in ARMVAParameters	Peter Maydell	1	-7/+1
2022-10-10	target/arm: Use tlb_set_page_full	Richard Henderson	1	-89/+90
2022-10-10	target/arm: Fix cacheattr in get_phys_addr_disabled	Richard Henderson	1	-23/+25
2022-10-10	target/arm: Split out get_phys_addr_disabled	Richard Henderson	1	-64/+74
2022-10-10	target/arm: Fix ATS12NSO* from S PL1	Richard Henderson	1	-4/+4
2022-10-10	target/arm: Pass HCR to attribute subroutines.	Richard Henderson	1	-13/+17
2022-10-10	target/arm: Remove env argument from combined_attrs_fwb	Richard Henderson	1	-3/+2
2022-10-10	target/arm: Hoist read of *is_secure in S1_ptw_translate	Richard Henderson	1	-10/+12
2022-10-10	target/arm: Drop secure check for HCR.TGE vs SCTLR_EL1.M	Richard Henderson	1	-2/+2
2022-10-10	target/arm: Reorg regime_translation_disabled	Richard Henderson	1	-7/+25
2022-10-10	target/arm: Fold secure and non-secure a-profile mmu indexes	Richard Henderson	1	-21/+4
2022-10-10	target/arm: Merge regime_is_secure into get_phys_addr	Richard Henderson	1	-2/+42
2022-10-10	target/arm: Split out get_phys_addr_with_secure	Richard Henderson	1	-29/+15
2022-10-10	target/arm: Add is_secure parameter to regime_translation_disabled	Richard Henderson	1	-9/+11
2022-10-10	target/arm: Fix S2 disabled check in S1_ptw_translate	Richard Henderson	1	-3/+3
2022-10-10	target/arm: Add is_secure parameter to get_phys_addr_lpae	Richard Henderson	1	-10/+10
2022-10-10	target/arm: Make the final stage1+2 write to secure be unconditional	Richard Henderson	1	-11/+10
2022-10-10	target/arm: Split s2walk_secure from ipa_secure in get_phys_addr	Richard Henderson	1	-9/+9
2022-09-22	target/arm: Add is_secure parameter to get_phys_addr_pmsav5	Richard Henderson	1	-2/+2
2022-09-22	target/arm: Add secure parameter to get_phys_addr_pmsav7	Richard Henderson	1	-3/+2
2022-09-22	target/arm: Add is_secure parameter to pmsav7_use_background_region	Richard Henderson	1	-5/+5
2022-09-22	target/arm: Add secure parameter to get_phys_addr_pmsav8	Richard Henderson	1	-3/+2
2022-09-22	target/arm: Add is_secure parameter to get_phys_addr_v6	Richard Henderson	1	-6/+5
2022-09-22	target/arm: Add is_secure parameter to get_phys_addr_v5	Richard Henderson	1	-7/+7
2022-09-22	target/arm: Add secure parameter to pmsav8_mpu_lookup	Richard Henderson	1	-4/+3
2022-09-22	target/arm: Add is_secure parameter to v8m_security_lookup	Richard Henderson	1	-4/+5
2022-09-22	target/arm: Remove is_subpage argument to pmsav8_mpu_lookup	Richard Henderson	1	-11/+12
2022-09-22	target/arm: Use GetPhysAddrResult in pmsav8_mpu_lookup	Richard Henderson	1	-11/+9
2022-09-22	target/arm: Use GetPhysAddrResult in get_phys_addr_pmsav8	Richard Henderson	1	-14/+14
2022-09-22	target/arm: Use GetPhysAddrResult in get_phys_addr_pmsav7	Richard Henderson	1	-19/+17
2022-09-22	target/arm: Use GetPhysAddrResult in get_phys_addr_pmsav5	Richard Henderson	1	-12/+12
2022-09-22	target/arm: Use GetPhysAddrResult in get_phys_addr_v5	Richard Henderson	1	-14/+11
2022-09-22	target/arm: Use GetPhysAddrResult in get_phys_addr_v6	Richard Henderson	1	-16/+14
2022-09-22	target/arm: Use GetPhysAddrResult in get_phys_addr_lpae	Richard Henderson	1	-43/+26
2022-09-22	target/arm: Create GetPhysAddrResult	Richard Henderson	1	-57/+63
2022-07-18	target/arm: Store TCR_EL* registers as uint64_t	Peter Maydell	1	-1/+1
2022-07-18	target/arm: Store VTCR_EL2, VSTCR_EL2 registers as uint64_t	Peter Maydell	1	-7/+7
2022-07-18	target/arm: Fold regime_tcr() and regime_tcr_value() together	Peter Maydell	1	-3/+3
2022-07-18	target/arm: Calculate mask/base_mask in get_level1_table_address()	Peter Maydell	1	-5/+9
2022-07-18	target/arm: Define and use new regime_tcr_value() function	Peter Maydell	1	-4/+4
2022-07-07	target/arm: Fix qemu-system-arm handling of LPAE block descriptors for highmem	Peter Maydell	1	-1/+1
2022-06-27	target/arm: Check V7VE as well as LPAE in arm_pamax	Richard Henderson	1	-1/+7