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path: root/target/arm/machine.c
AgeCommit message (Expand)AuthorFilesLines
2022-05-05target/arm: Avoid bare abort() or assert(0)Richard Henderson1-2/+2
2021-12-15target/arm: Assert thumb pc is alignedRichard Henderson1-0/+10
2021-09-21target/arm: Enforce that FPDSCR.LTPSIZE is 4 on inbound migrationPeter Maydell1-0/+13
2021-06-03target/arm: Make FPSCR.LTPSIZE writable for MVEPeter Maydell1-0/+1
2021-06-03target/arm: Implement M-profile VPR registerPeter Maydell1-0/+19
2021-02-11target/arm: Don't migrate CPUARMState.featuresAaron Lindsay1-1/+1
2020-12-19migration: Replace migration's JSON writer by the general oneMarkus Armbruster1-3/+3
2020-02-28target/arm: Add isar_feature_aa64_fp_simd, isar_feature_aa32_vfpRichard Henderson1-2/+3
2020-01-30target/arm/kvm: Implement virtual time adjustmentAndrew Jones1-0/+7
2019-10-24target/arm: Rebuild hflags at EL changesRichard Henderson1-0/+1
2019-08-16Include hw/boards.h a bit lessMarkus Armbruster1-1/+0
2019-08-16Include hw/hw.h exactly where neededMarkus Armbruster1-1/+0
2019-06-12Include qemu-common.h exactly where neededMarkus Armbruster1-1/+0
2019-05-07arm: Allow system registers for KVM guests to be changed by QEMU codePeter Maydell1-1/+1
2019-04-29target/arm: Implement dummy versions of M-profile FP-related registersPeter Maydell1-0/+16
2019-02-28Revert "arm: Allow system registers for KVM guests to be changed by QEMU code"Peter Maydell1-1/+1
2019-02-15arm: Allow system registers for KVM guests to be changed by QEMU codePeter Maydell1-1/+1
2019-01-21target/arm: Swap PMU values before/after migrationsAaron Lindsay1-0/+24
2018-11-27vmstate: constify VMStateFieldMarc-André Lureau1-6/+6
2018-11-13target/arm: Track the state of our irq lines from the GIC explicitlyPeter Maydell1-0/+51
2018-10-24target/arm: Convert sve from feature bit to aa64pfr0 testRichard Henderson1-2/+1
2018-10-24target/arm: Add support for VCPU event statesDongjiu Geng1-0/+22
2018-08-06target/arm: Add dummy needed functions to M profile vmstate subsectionsPeter Maydell1-0/+3
2018-02-15target/arm: Implement v8M MSPLIM and PSPLIM registersPeter Maydell1-0/+21
2018-02-15target/arm: Migrate v7m.other_spPeter Maydell1-0/+11
2018-02-15target/arm: Add AIRCR to vmstate structPeter Maydell1-0/+4
2018-02-15hw/intc/armv7m_nvic: Implement SCRPeter Maydell1-0/+12
2018-02-15hw/intc/armv7m_nvic: Implement cache ID registersPeter Maydell1-0/+36
2018-02-09target/arm: Add SVE to migration stateRichard Henderson1-0/+53
2018-02-09target/arm: Expand vector registers for SVERichard Henderson1-1/+34
2018-01-25target/arm: Change the type of vfp.regsRichard Henderson1-1/+1
2017-10-06nvic: Implement Security Attribution Unit registersPeter Maydell1-0/+14
2017-10-06target/arm: Add new-in-v8M SFSR and SFARPeter Maydell1-0/+2
2017-09-27migration: pre_save return intDr. David Alan Gilbert1-1/+3
2017-09-07target/arm: Implement BXNS, and banked stack pointersPeter Maydell1-0/+2
2017-09-07target/arm: Make CFSR register banked for v8MPeter Maydell1-1/+2
2017-09-07target/arm: Make MMFAR banked for v8MPeter Maydell1-1/+2
2017-09-07target/arm: Make CCR register banked for v8MPeter Maydell1-1/+2
2017-09-07target/arm: Make MPU_CTRL register banked for v8MPeter Maydell1-1/+2
2017-09-07target/arm: Make MPU_RNR register banked for v8MPeter Maydell1-2/+11
2017-09-07target/arm: Make MPU_RBAR, MPU_RLAR banked for v8MPeter Maydell1-4/+8
2017-09-07target/arm: Make MPU_MAIR0, MPU_MAIR1 registers banked for v8MPeter Maydell1-2/+4
2017-09-07target/arm: Make VTOR register banked for v8MPeter Maydell1-1/+2
2017-09-07target/arm: Make CONTROL register banked for v8MPeter Maydell1-1/+2
2017-09-07target/arm: Make FAULTMASK register banked for v8MPeter Maydell1-2/+3
2017-09-07target/arm: Make PRIMASK register banked for v8MPeter Maydell1-2/+7
2017-09-07target/arm: Make BASEPRI register banked for v8MPeter Maydell1-1/+2
2017-09-07target/arm: Add state field, feature bit and migration for v8M secure statePeter Maydell1-0/+20
2017-09-07target/arm: Implement ARMv8M's PMSAv8 registersPeter Maydell1-1/+28
2017-09-04target/arm: Don't use cpsr_write/cpsr_read to transfer M profile XPSRPeter Maydell1-15/+34