riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2023-02-27	target/cpu: Restrict do_transaction_failed() handlers to sysemu	Philippe Mathieu-Daudé	1	-0/+2
2023-02-27	target/arm: Move regime_using_lpae_format into internal.h	Fabiano Rosas	1	-3/+18
2023-02-27	target/arm: Move hflags code into the tcg directory	Fabiano Rosas	1	-0/+2
2023-02-16	target/arm: Reduce arm_v7m_mmu_idx_[all/for_secstate_and_priv]() scope	Philippe Mathieu-Daudé	1	-14/+0
2023-02-03	target/arm: Implement FGT trapping infrastructure	Peter Maydell	1	-0/+20
2023-01-05	target/arm: Enable TTBCR_EAE for ARMv8-R AArch32	Tobias Röhmel	1	-0/+4
2022-11-29	target/arm: Set TCGCPUOps.restore_state_to_opc for v7m	Evgeny Ermakov	1	-0/+4
2022-10-27	target/arm: Add ARMFault_UnsuppAtomicUpdate	Richard Henderson	1	-0/+4
2022-10-27	target/arm: Extract HA and HD in aa64_va_parameters	Richard Henderson	1	-0/+2
2022-10-27	target/arm: Introduce regime_is_stage2	Richard Henderson	1	-0/+5
2022-10-27	target/arm: Implement FEAT_E0PD	Peter Maydell	1	-0/+19
2022-10-26	accel/tcg: Make page_alloc_target_data allocation constant	Richard Henderson	1	-4/+0
2022-10-20	target/arm: Use probe_access_full for BTI	Richard Henderson	1	-0/+1
2022-10-10	target/arm: Use ARMGranuleSize in ARMVAParameters	Peter Maydell	1	-2/+21
2022-10-10	target/arm: Don't allow guest to use unimplemented granule sizes	Peter Maydell	1	-0/+9
2022-10-10	target/arm: Use tlb_set_page_full	Richard Henderson	1	-4/+1
2022-10-10	target/arm: Fold secure and non-secure a-profile mmu indexes	Richard Henderson	1	-28/+3
2022-10-10	target/arm: Merge regime_is_secure into get_phys_addr	Richard Henderson	1	-42/+0
2022-10-10	target/arm: Split out get_phys_addr_with_secure	Richard Henderson	1	-0/+40
2022-09-22	target/arm: Add secure parameter to pmsav8_mpu_lookup	Richard Henderson	1	-2/+2
2022-09-22	target/arm: Add is_secure parameter to v8m_security_lookup	Richard Henderson	1	-1/+1
2022-09-22	target/arm: Remove is_subpage argument to pmsav8_mpu_lookup	Richard Henderson	1	-2/+2
2022-09-22	target/arm: Use GetPhysAddrResult in pmsav8_mpu_lookup	Richard Henderson	1	-6/+5
2022-09-22	target/arm: Create GetPhysAddrResult	Richard Henderson	1	-3/+10
2022-09-14	target/arm: Support 64-bit event counters for FEAT_PMUv3p5	Peter Maydell	1	-1/+2
2022-09-14	target/arm: Correct value returned by pmu_counter_mask()	Peter Maydell	1	-1/+1
2022-07-18	target/arm: Honour VTCR_EL2 bits in Secure EL2	Peter Maydell	1	-3/+19
2022-07-18	target/arm: Store TCR_EL* registers as uint64_t	Peter Maydell	1	-3/+3
2022-07-18	target/arm: Store VTCR_EL2, VSTCR_EL2 registers as uint64_t	Peter Maydell	1	-2/+2
2022-07-18	target/arm: Fold regime_tcr() and regime_tcr_value() together	Peter Maydell	1	-11/+5
2022-07-18	target/arm: Define and use new regime_tcr_value() function	Peter Maydell	1	-0/+6
2022-07-07	target/arm: Move define_debug_regs() to debug_helper.c	Peter Maydell	1	-0/+9
2022-06-27	target/arm: Add cpu properties for SME	Richard Henderson	1	-0/+1
2022-06-27	target/arm: Move arm_cpu_*_finalize to internals.h	Richard Henderson	1	-0/+3
2022-06-10	target/arm: Move arm_debug_exception_fsr to debug_helper.c	Richard Henderson	1	-25/+0
2022-06-10	target/arm: Move arm_generate_debug_exceptions out of line	Richard Henderson	1	-0/+1
2022-06-10	target/arm: Move arm_singlestep_active out of line	Richard Henderson	1	-0/+1
2022-06-10	target/arm: Move exception_target_el out of line	Richard Henderson	1	-15/+1
2022-06-08	target/arm: Use uint32_t instead of bitmap for sve vq's	Richard Henderson	1	-0/+5
2022-06-08	target/arm: Merge aarch64_sve_zcr_get_valid_len into caller	Richard Henderson	1	-11/+0
2022-06-08	target/arm: Add el_is_in_host	Richard Henderson	1	-0/+2
2022-06-08	target/arm: Move get_phys_addr to ptw.c	Richard Henderson	1	-2/+16
2022-06-08	target/arm: Move stage_1_mmu_idx decl to internals.h	Richard Henderson	1	-0/+5
2022-06-08	Fix 'writeable' typos	Peter Maydell	1	-2/+2
2022-05-19	target/arm: Make number of counters in PMCR follow the CPU	Peter Maydell	1	-1/+3
2022-05-19	target/arm: Postpone interpretation of stage 2 descriptor attribute bits	Peter Maydell	1	-1/+6
2022-05-09	target/arm: Implement virtual SError exceptions	Richard Henderson	1	-0/+8
2022-05-09	target/arm: Split out aa32_max_features	Richard Henderson	1	-0/+2
2022-05-09	target/arm: Move cortex impdef sysregs to cpu_tcg.c	Richard Henderson	1	-0/+6
2022-04-28	target/arm: Use field names for accessing DBGWCRn	Richard Henderson	1	-0/+12