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path: root/target/arm/internals.h
AgeCommit message (Expand)AuthorFilesLines
2022-06-08target/arm: Use uint32_t instead of bitmap for sve vq'sRichard Henderson1-0/+5
2022-06-08target/arm: Merge aarch64_sve_zcr_get_valid_len into callerRichard Henderson1-11/+0
2022-06-08target/arm: Add el_is_in_hostRichard Henderson1-0/+2
2022-06-08target/arm: Move get_phys_addr to ptw.cRichard Henderson1-2/+16
2022-06-08target/arm: Move stage_1_mmu_idx decl to internals.hRichard Henderson1-0/+5
2022-06-08Fix 'writeable' typosPeter Maydell1-2/+2
2022-05-19target/arm: Make number of counters in PMCR follow the CPUPeter Maydell1-1/+3
2022-05-19target/arm: Postpone interpretation of stage 2 descriptor attribute bitsPeter Maydell1-1/+6
2022-05-09target/arm: Implement virtual SError exceptionsRichard Henderson1-0/+8
2022-05-09target/arm: Split out aa32_max_featuresRichard Henderson1-0/+2
2022-05-09target/arm: Move cortex impdef sysregs to cpu_tcg.cRichard Henderson1-0/+6
2022-04-28target/arm: Use field names for accessing DBGWCRnRichard Henderson1-0/+12
2022-04-21compiler.h: replace QEMU_NORETURN with G_NORETURNMarc-André Lureau1-6/+6
2022-04-01target/arm: Fix MTE access checks for disabled SEL2Idan Horowitz1-1/+1
2022-03-02target/arm: Implement FEAT_LPA2Richard Henderson1-0/+2
2022-03-02target/arm: Extend arm_fi_to_lfsc to level -1Richard Henderson1-6/+29
2022-03-02target/arm: Honor TCR_ELx.{I}PSRichard Henderson1-0/+1
2022-03-02target/arm: Move arm_pamax out of lineRichard Henderson1-18/+1
2022-03-02target/arm: Fault on invalid TCR_ELx.TxSZRichard Henderson1-0/+1
2022-01-28target/arm: Log CPU index in 'Taking exception' logPeter Maydell1-1/+1
2021-11-02target/arm: Implement arm_cpu_record_sigbusRichard Henderson1-0/+2
2021-11-02target/arm: Implement arm_cpu_record_sigsegvRichard Henderson1-0/+6
2021-09-30target/arm: Move gdbstub related code out of helper.cPeter Maydell1-0/+7
2021-09-21hw/core: Make do_unaligned_access noreturnRichard Henderson1-1/+1
2021-09-20arm: Move PMC register definitions to internals.hAlexander Graf1-0/+44
2021-07-27target/arm: Export aarch64_sve_zcr_get_valid_lenRichard Henderson1-0/+10
2021-07-21target/arm: Implement debug_check_breakpointRichard Henderson1-0/+3
2021-06-21target/arm: Implement MVE VLDR/VSTR (non-widening forms)Peter Maydell1-0/+11
2021-04-30target/arm: Rename mte_probe1 to mte_probeRichard Henderson1-1/+1
2021-04-30target/arm: Merge mte_check1, mte_checkNRichard Henderson1-4/+1
2021-04-30target/arm: Replace MTEDESC ESIZE+TSIZE with SIZEM1Richard Henderson1-2/+2
2021-03-05target/arm: Add support for FEAT_SSBS, Speculative Store Bypass SafeRebecca Cran1-0/+6
2021-02-18exec: Move TranslationBlock typedef to qemu/typedefs.hRichard Henderson1-2/+1
2021-02-16target/arm: Split out syndrome.h from internals.hRichard Henderson1-244/+1
2021-02-16target/arm: Use the proper TBI settings for linux-userRichard Henderson1-2/+2
2021-02-11target/arm: Add support for FEAT_DIT, Data Independent TimingRebecca Cran1-0/+6
2021-02-05cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClassClaudio Fontana1-0/+6
2021-01-19target/arm: Introduce PREDDESC field definitionsRichard Henderson1-0/+9
2021-01-19target/arm: set HPFAR_EL2.NS on secure stage 2 faultsRémi Denis-Courmont1-0/+2
2021-01-19target/arm: secure stage 2 translation regimeRémi Denis-Courmont1-0/+22
2021-01-19target/arm: add MMU stage 1 for Secure EL2Rémi Denis-Courmont1-0/+12
2020-10-20target/arm: Ignore HCR_EL2.ATA when {E2H,TGE} != 11Richard Henderson1-4/+5
2020-06-26target/arm: Always pass cacheattr to get_phys_addrRichard Henderson1-1/+2
2020-06-26target/arm: Add mte helpers for sve scalar + int loadsRichard Henderson1-0/+6
2020-06-26target/arm: Implement helper_mte_checkNRichard Henderson1-0/+2
2020-06-26target/arm: Implement helper_mte_check1Richard Henderson1-0/+48
2020-06-26target/arm: Add gen_mte_check1Richard Henderson1-0/+8
2020-06-26target/arm: Move regime_tcr to internals.hRichard Henderson1-0/+9
2020-06-26target/arm: Move regime_el to internals.hRichard Henderson1-0/+36
2020-06-26target/arm: Implement the ADDG, SUBG instructionsRichard Henderson1-0/+9