riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2023-09-21	target/arm: Implement FEAT_MOPS enable bits	Peter Maydell	1	-8/+22
2023-09-21	target/arm: Update user-mode ID reg mask values	Peter Maydell	1	-1/+10
2023-09-08	target/arm: Implement RMR_ELx	Richard Henderson	1	-23/+41
2023-09-08	target/arm: Add ID_AA64ISAR2_EL1	Aaron Lindsay	1	-2/+2
2023-08-31	target/arm: Apply access checks to neoverse-n1 special registers	Richard Henderson	1	-2/+2
2023-08-31	target/arm: Allow cpu to configure GM blocksize	Richard Henderson	1	-4/+7
2023-08-22	target/arm/helper: Implement CNTHCTL_EL2.CNT[VP]MASK	Jean-Philippe Brucker	1	-11/+54
2023-08-22	target/arm/helper: Check SCR_EL3.{NSE, NS} encoding for AT instructions	Jean-Philippe Brucker	1	-11/+27
2023-08-22	target/arm: Pass security space rather than flag for AT instructions	Jean-Philippe Brucker	1	-15/+12
2023-08-22	target/arm: Skip granule protection checks for AT instructions	Jean-Philippe Brucker	1	-2/+6
2023-08-22	target/arm/helper: Fix tlbmask and tlbbits for TLBI VAE2*	Jean-Philippe Brucker	1	-10/+40
2023-08-22	target/arm: Adjust PAR_EL1.SH for Device and Normal-NC memory types	Peter Maydell	1	-1/+14
2023-08-22	target/arm: Pass an ARMSecuritySpace to arm_is_el2_enabled_secstate()	Peter Maydell	1	-1/+1
2023-08-22	target/arm/ptw: Pass an ARMSecuritySpace to arm_hcr_el2_eff_secstate()	Peter Maydell	1	-3/+5
2023-07-25	arm: spelling fixes	Michael Tokarev	1	-2/+2
2023-07-06	target/arm: Handle IC IVAU to improve compatibility with JITs	John Högberg	1	-3/+44
2023-07-04	target/arm: Add raw_writes ops for register whose write induce TLB maintenance	Eric Auger	1	-10/+13
2023-06-26	target: Widen pc/cs_base in cpu_get_tb_cpu_state	Anton Johansson	1	-2/+2
2023-06-23	target/arm: Implement GPC exceptions	Richard Henderson	1	-0/+5
2023-06-23	target/arm: Introduce ARMSecuritySpace	Richard Henderson	1	-0/+60
2023-06-23	target/arm: Add RME cpregs	Richard Henderson	1	-0/+84
2023-06-23	target/arm: SCR_EL3.NS may be RES1	Richard Henderson	1	-0/+3
2023-06-23	target/arm: Update SCR and HCR for RME	Richard Henderson	1	-2/+8
2023-06-06	target/arm: allow DC CVA[D]P in user mode emulation	Zhuojia Shen	1	-4/+2
2023-05-12	target/arm: Correct AArch64.S2MinTxSZ 32-bit EL1 input size check	Peter Maydell	1	-2/+13
2023-03-06	target/arm: Stub arm_hcr_el2_eff for m-profile	Richard Henderson	1	-0/+3
2023-03-02	target/arm: Restrict 'qapi-commands-machine.h' to system emulation	Philippe Mathieu-Daudé	1	-29/+0
2023-02-27	target/arm: Move hflags code into the tcg directory	Fabiano Rosas	1	-392/+1
2023-02-27	target/arm: Wrap arm_rebuild_hflags calls with tcg_enabled	Fabiano Rosas	1	-5/+13
2023-02-16	target/arm: wrap call to aarch64_sve_change_el in tcg_enabled()	Claudio Fontana	1	-5/+7
2023-02-16	target/arm: wrap psci call with tcg_enabled	Claudio Fontana	1	-1/+2
2023-02-16	target/arm: rename handle_semihosting to tcg_handle_semihosting	Claudio Fontana	1	-2/+2
2023-02-16	target/arm: Constify ID_PFR1 on user emulation	Philippe Mathieu-Daudé	1	-2/+10
2023-02-03	target/arm: Implement the HFGITR_EL2.SVC_EL0 and SVC_EL1 traps	Peter Maydell	1	-0/+20
2023-02-03	target/arm: Implement the HFGITR_EL2.ERET trap	Peter Maydell	1	-0/+3
2023-02-03	target/arm: Mark up sysregs for HFGITR bits 48..63	Peter Maydell	1	-0/+9
2023-02-03	target/arm: Mark up sysregs for HFGITR bits 18..47	Peter Maydell	1	-0/+30
2023-02-03	target/arm: Mark up sysregs for HFGITR bits 12..17	Peter Maydell	1	-0/+6
2023-02-03	target/arm: Mark up sysregs for HFGITR bits 0..11	Peter Maydell	1	-0/+28
2023-02-03	target/arm: Mark up sysregs for HDFGRTR bits 12..63	Peter Maydell	1	-0/+37
2023-02-03	target/arm: Mark up sysregs for HFGRTR bits 36..63	Peter Maydell	1	-0/+10
2023-02-03	target/arm: Mark up sysregs for HFGRTR bits 24..35	Peter Maydell	1	-0/+14
2023-02-03	target/arm: Mark up sysregs for HFGRTR bits 12..23	Peter Maydell	1	-0/+12
2023-02-03	target/arm: Mark up sysregs for HFGRTR bits 0..11	Peter Maydell	1	-0/+17
2023-02-03	target/arm: Implement FGT trapping infrastructure	Peter Maydell	1	-0/+9
2023-02-03	target/arm: Define the FEAT_FGT registers	Peter Maydell	1	-0/+40
2023-02-03	target/arm: Disable HSTR_EL2 traps if EL2 is not enabled	Peter Maydell	1	-1/+1
2023-02-03	target/arm: Correct syndrome for ATS12NSO* at Secure EL1	Peter Maydell	1	-2/+2
2023-02-03	target/arm: Name AT_S1E1RP and AT_S1E1WP cpregs correctly	Peter Maydell	1	-2/+2
2023-01-23	target/arm/sme: Unify set_pstate() SM/ZA helpers as set_svcr()	Richard Henderson	1	-2/+0