index
:
riscv-gnu-toolchain/qemu.git
block
master
stable-0.10
stable-0.11
stable-0.12
stable-0.13
stable-0.14
stable-0.15
stable-1.0
stable-1.1
stable-1.2
stable-1.3
stable-1.4
stable-1.5
stable-1.6
stable-1.7
stable-2.0
stable-2.1
stable-2.10
stable-2.11
stable-2.12
stable-2.2
stable-2.3
stable-2.4
stable-2.5
stable-2.6
stable-2.7
stable-2.8
stable-2.9
stable-3.0
stable-3.1
stable-4.0
stable-4.1
stable-4.2
stable-5.0
stable-6.0
stable-6.1
stable-7.2
stable-8.0
stable-8.1
stable-8.2
stable-9.0
stable-9.1
stable-9.2
staging
staging-7.2
staging-8.0
staging-8.1
staging-8.2
staging-9.0
staging-9.1
staging-9.2
Unnamed repository; edit this file 'description' to name the repository.
root
about
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
target
/
arm
/
helper.c
Age
Commit message (
Expand
)
Author
Files
Lines
2019-02-21
target/arm: Split out vfp_helper.c
Richard Henderson
1
-1062
/
+0
2019-02-21
target/arm: Stop unintentional sign extension in pmu_init
Aaron Lindsay OS
1
-1
/
+1
2019-02-21
target/arm: v8M MPU should use background region as default, not always
Peter Maydell
1
-3
/
+5
2019-02-18
qapi: make query-cpu-definitions depend on specific targets
Marc-André Lureau
1
-1
/
+2
2019-02-15
target/arm: Split out FPSCR.QC to a vector field
Richard Henderson
1
-4
/
+15
2019-02-15
target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR]
Richard Henderson
1
-7
/
+8
2019-02-15
target/arm: Split out flags setting from vfp compares
Richard Henderson
1
-18
/
+27
2019-02-15
target/arm: Fix vfp_gdb_get/set_reg vs FPSCR
Richard Henderson
1
-2
/
+2
2019-02-15
arm: Allow system registers for KVM guests to be changed by QEMU code
Peter Maydell
1
-2
/
+25
2019-02-15
target/arm: expose remaining CPUID registers as RAZ
Alex Bennée
1
-3
/
+23
2019-02-15
target/arm: expose MPIDR_EL1 to userspace
Alex Bennée
1
-7
/
+14
2019-02-15
target/arm: expose CPUID registers to userspace
Alex Bennée
1
-0
/
+59
2019-02-15
target/arm: relax permission checks for HWCAP_CPUID registers
Alex Bennée
1
-1
/
+5
2019-02-15
target/arm: Implement HACR_EL2
Peter Maydell
1
-0
/
+6
2019-02-15
target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR
Aaron Lindsay OS
1
-4
/
+4
2019-02-05
target/arm: Make FPSCR/FPCR trapped-exception bits RAZ/WI
Peter Maydell
1
-0
/
+6
2019-02-05
target/arm: Compute TB_FLAGS for TBI for user-only
Peter Maydell
1
-21
/
+24
2019-02-05
target/arm: Add TBFLAG_A64_TBID, split out gen_top_byte_ignore
Richard Henderson
1
-0
/
+1
2019-02-05
target/arm: Cache the GP bit for a page in MemTxAttrs
Richard Henderson
1
-0
/
+6
2019-02-05
target/arm: Add BT and BTYPE to tb->flags
Richard Henderson
1
-7
/
+15
2019-02-01
target/arm: Enable API, APK bits in SCR, HCR
Richard Henderson
1
-0
/
+6
2019-02-01
target/arm: Add a timer to predict PMU counter overflow
Aaron Lindsay OS
1
-2
/
+70
2019-02-01
target/arm: Send interrupts on PMU counter overflow
Aaron Lindsay OS
1
-10
/
+51
2019-01-29
target/arm: Don't clear supported PMU events when initializing PMCEID1
Aaron Lindsay OS
1
-11
/
+16
2019-01-29
target/arm: v8m: Ensure IDAU is respected if SAU is disabled
Thomas Roth
1
-9
/
+10
2019-01-29
target/arm: Fix validation of 32-bit address spaces for aa32
Richard Henderson
1
-7
/
+14
2019-01-21
target/arm: Implement PMSWINC
Aaron Lindsay
1
-2
/
+37
2019-01-21
target/arm: PMU: Set PMCR.N to 4
Aaron Lindsay
1
-5
/
+5
2019-01-21
target/arm: PMU: Add instruction and cycle events
Aaron Lindsay
1
-46
/
+44
2019-01-21
target/arm: Finish implementation of PM[X]EVCNTR and PM[X]EVTYPER
Aaron Lindsay
1
-17
/
+279
2019-01-21
target/arm: Add array for supported PMU events, generate PMCEID[01]_EL0
Aaron Lindsay
1
-0
/
+57
2019-01-21
target/arm: Make PMCEID[01]_EL0 64 bit registers, add PMCEID[23]
Aaron Lindsay
1
-2
/
+17
2019-01-21
target/arm: Implement PMOVSSET
Aaron Lindsay
1
-0
/
+28
2019-01-21
target/arm: Allow AArch32 access for PMCCFILTR
Aaron Lindsay
1
-1
/
+26
2019-01-21
target/arm: Filter cycle counter based on PMCCFILTR_EL0
Aaron Lindsay
1
-7
/
+89
2019-01-21
target/arm: Swap PMU values before/after migrations
Aaron Lindsay
1
-2
/
+4
2019-01-21
target/arm: Reorganize PMCCNTR accesses
Aaron Lindsay
1
-45
/
+69
2019-01-21
target/arm: Add PAuth system registers
Richard Henderson
1
-0
/
+70
2019-01-21
target/arm: Reuse aa64_va_parameters for setting tbflags
Richard Henderson
1
-46
/
+24
2019-01-21
target/arm: Decode TBID from TCR
Richard Henderson
1
-3
/
+11
2019-01-21
target/arm: Add aa64_va_parameters_both
Richard Henderson
1
-2
/
+8
2019-01-21
target/arm: Export aa64_va_parameters to internals.h
Richard Henderson
1
-2
/
+2
2019-01-21
target/arm: Merge TBFLAG_AA_TB{0, 1} to TBII
Richard Henderson
1
-3
/
+2
2019-01-21
target/arm: Create ARMVAParameters and helpers
Richard Henderson
1
-128
/
+150
2019-01-21
target/arm: Introduce arm_stage1_mmu_idx
Richard Henderson
1
-0
/
+7
2019-01-21
target/arm: Introduce arm_mmu_idx
Richard Henderson
1
-11
/
+16
2019-01-21
target/arm: Move cpu_mmu_index out of line
Richard Henderson
1
-0
/
+44
2019-01-21
target/arm: Add PAuth active bit to tbflags
Richard Henderson
1
-0
/
+19
2019-01-21
target/arm: Allow Aarch32 exception return to switch from Mon->Hyp
Alexander Graf
1
-1
/
+1
2019-01-07
target/arm: Convert ARM_TBFLAG_* to FIELDs
Richard Henderson
1
-25
/
+24
[next]