riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2022-02-08	target/arm: Use CPTR_TFP with CPTR_EL3 in fp_exception_el	Richard Henderson	1	-1/+1
2022-02-08	target/arm: Fix {fp, sve}_exception_el for VHE mode running	Richard Henderson	1	-17/+60
2022-02-08	target/arm: Tidy sve_exception_el for CPACR_EL1 access	Richard Henderson	1	-19/+17
2022-02-08	target/arm: Fix sve_zcr_len_for_el for VHE mode running	Richard Henderson	1	-1/+2
2022-01-28	target/arm: Use correct entrypoint for SVC taken from Hyp to Hyp	Peter Maydell	1	-2/+2
2022-01-28	target/arm: Log CPU index in 'Taking exception' log	Peter Maydell	1	-3/+6
2022-01-07	target/arm: Add missing FEAT_TLBIOS instructions	Idan Horowitz	1	-0/+32
2021-12-15	target/arm: Correct calculation of tlb range invalidate length	Peter Maydell	1	-3/+3
2021-09-30	target/arm: Move gdbstub related code out of helper.c	Peter Maydell	1	-271/+0
2021-09-30	target/arm: Fix coding style issues in gdbstub code in helper.c	Peter Maydell	1	-7/+16
2021-09-21	target/arm: Add TB flag for "MVE insns not predicated"	Peter Maydell	1	-0/+33
2021-09-20	arm: Move PMC register definitions to internals.h	Alexander Graf	1	-44/+0
2021-09-13	target/arm: Take an exception if PSTATE.IL is set	Peter Maydell	1	-0/+8
2021-08-26	target/arm: Do hflags rebuild in cpsr_write()	Peter Maydell	1	-0/+5
2021-08-26	target/arm: Implement HSTR.TJDBX	Peter Maydell	1	-0/+17
2021-08-26	target/arm: Implement HSTR.TTEE	Peter Maydell	1	-2/+16
2021-08-25	target/arm: Implement M-profile trapping on division by zero	Peter Maydell	1	-2/+17
2021-08-25	target/arm: Re-indent sdiv and udiv helpers	Peter Maydell	1	-6/+9
2021-07-27	target/arm: Export aarch64_sve_zcr_get_valid_len	Richard Henderson	1	-2/+2
2021-07-27	target/arm: Correctly bound length in sve_zcr_get_valid_len	Richard Henderson	1	-1/+3
2021-07-18	target/arm: Fix offsets for TTBCR	Richard Henderson	1	-4/+7
2021-07-09	target/arm: Correct the encoding of MDCCSR_EL0 and DBGDSCRint	hnick@vmware.com	1	-3/+13
2021-05-25	target/arm: Add ID_AA64ZFR0 fields and isar_feature_aa64_sve2	Richard Henderson	1	-2/+1
2021-05-25	target/arm: Add support for FEAT_TLBIOS	Rebecca Cran	1	-0/+43
2021-05-25	target/arm: Add support for FEAT_TLBIRANGE	Rebecca Cran	1	-0/+281
2021-05-10	target/arm: Fix tlbbits calculation in tlbi_aa64_vae2is_write()	Peter Maydell	1	-1/+1
2021-04-30	target/arm: Add ALIGN_MEM to TBFLAG_ANY	Richard Henderson	1	-2/+17
2021-04-30	target/arm: Move mode specific TB flags to tb->cs_base	Richard Henderson	1	-4/+6
2021-04-30	target/arm: Introduce CPUARMTBFlags	Richard Henderson	1	-22/+26
2021-04-30	target/arm: Add wrapper macros for accessing tbflags	Richard Henderson	1	-46/+39
2021-04-30	target/arm: Rename TBFLAG_ANY, PSTATE_SS	Richard Henderson	1	-2/+2
2021-04-30	target/arm: Rename TBFLAG_A32, SCTLR_B	Richard Henderson	1	-1/+1
2021-04-06	Revert "target/arm: Make number of counters in PMCR follow the CPU"	Peter Maydell	1	-17/+12
2021-03-30	target/arm: Make number of counters in PMCR follow the CPU	Peter Maydell	1	-12/+17
2021-03-10	semihosting: Move include/hw/semihosting/ -> include/semihosting/	Philippe Mathieu-Daudé	1	-2/+2
2021-03-05	target/arm: Use TCF0 and TFSRE0 for unprivileged tag checks	Peter Collingbourne	1	-1/+1
2021-03-05	target/arm: Add support for FEAT_SSBS, Speculative Store Bypass Safe	Rebecca Cran	1	-0/+37
2021-02-11	target/arm: Correctly initialize MDCR_EL2.HPMN	Daniel Müller	1	-5/+4
2021-02-11	target/arm: Support AA32 DIT by moving PSTATE_SS from cpsr into env->pstate	Rebecca Cran	1	-6/+18
2021-02-11	target/arm: Add support for FEAT_DIT, Data Independent Timing	Rebecca Cran	1	-0/+22
2021-02-11	target/arm: Fix SCR RES1 handling	Mike Nawrocki	1	-2/+14
2021-02-05	target/arm: do not use cc->do_interrupt for KVM directly	Claudio Fontana	1	-0/+4
2021-01-29	target/arm: Replace magic value by MMU_DATA_LOAD definition	Philippe Mathieu-Daudé	1	-1/+1
2021-01-29	target/arm: Conditionalize DBGDIDR	Richard Henderson	1	-6/+15
2021-01-29	target/arm: Implement ID_PFR2	Richard Henderson	1	-2/+2
2021-01-19	target/arm: refactor vae1_tlbmask()	Rémi Denis-Courmont	1	-14/+11
2021-01-19	target/arm: Implement SCR_EL2.EEL2	Rémi Denis-Courmont	1	-3/+16
2021-01-19	target/arm: set HPFAR_EL2.NS on secure stage 2 faults	Rémi Denis-Courmont	1	-0/+6
2021-01-19	target/arm: secure stage 2 translation regime	Rémi Denis-Courmont	1	-24/+54
2021-01-19	target/arm: generalize 2-stage page-walk condition	Rémi Denis-Courmont	1	-7/+6