Age | Commit message (Expand) | Author | Files | Lines |
2020-06-05 | memory: Rename memory_region_do_writeback -> memory_region_writeback | Philippe Mathieu-Daudé | 1 | -1/+1 |
2020-05-14 | target-arm: kvm64: handle SIGBUS signal from kernel or KVM | Dongjiu Geng | 1 | -1/+1 |
2020-05-11 | target/arm: Drop access_el3_aa32ns_aa64any() | Edgar E. Iglesias | 1 | -23/+7 |
2020-05-04 | target/arm: Implement ARMv8.2-TTS2UXN | Peter Maydell | 1 | -6/+31 |
2020-05-04 | target/arm: Add new 's1_is_el0' argument to get_phys_addr_lpae() | Peter Maydell | 1 | -1/+28 |
2020-05-04 | target/arm: Use enum constant in get_phys_addr_lpae() call | Peter Maydell | 1 | -2/+3 |
2020-05-04 | target/arm: Don't use a TLB for ARMMMUIdx_Stage2 | Peter Maydell | 1 | -101/+11 |
2020-04-30 | target/arm: Restrict the Address Translate write operation to TCG accel | Philippe Mathieu-Daudé | 1 | -0/+17 |
2020-04-03 | target/arm: Remove obsolete TODO note from get_phys_addr_lpae() | Peter Maydell | 1 | -6/+1 |
2020-04-03 | target/arm: PSTATE.PAN should not clear exec bits | Peter Maydell | 1 | -2/+4 |
2020-03-30 | target/arm: fix incorrect current EL bug in aarch32 exception emulation | Changbin Du | 1 | -1/+4 |
2020-03-23 | target/arm: Rearrange disabled check for watchpoints | Richard Henderson | 1 | -5/+6 |
2020-03-17 | target/arm: don't bother with id_aa64pfr0_read for USER_ONLY | Alex Bennée | 1 | -5/+15 |
2020-03-17 | target/arm: generate xml description of our SVE registers | Alex Bennée | 1 | -3/+122 |
2020-03-17 | target/arm: explicitly encode regnum in our XML | Alex Bennée | 1 | -1/+1 |
2020-03-17 | target/arm: prepare for multiple dynamic XMLs | Alex Bennée | 1 | -2/+2 |
2020-03-17 | gdbstub: extend GByteArray to read register helpers | Alex Bennée | 1 | -11/+8 |
2020-03-17 | target/arm: use gdb_get_reg helpers | Alex Bennée | 1 | -11/+7 |
2020-03-12 | target/arm: Check addresses for disabled regimes | Richard Henderson | 1 | -1/+34 |
2020-03-12 | target/arm: Fix some comment typos | Peter Maydell | 1 | -1/+1 |
2020-03-12 | target/arm: Recalculate hflags correctly after writes to CONTROL | Peter Maydell | 1 | -0/+12 |
2020-03-05 | target/arm: Optimize cpu_mmu_index | Richard Henderson | 1 | -5/+0 |
2020-03-05 | target/arm: Replicate TBI/TBID bits for single range regimes | Richard Henderson | 1 | -2/+4 |
2020-03-05 | target/arm: Honor the HCR_EL2.TTLB bit | Richard Henderson | 1 | -30/+55 |
2020-03-05 | target/arm: Honor the HCR_EL2.TPU bit | Richard Henderson | 1 | -20/+31 |
2020-03-05 | target/arm: Honor the HCR_EL2.TPCP bit | Richard Henderson | 1 | -8/+31 |
2020-03-05 | target/arm: Honor the HCR_EL2.TACR bit | Richard Henderson | 1 | -4/+14 |
2020-03-05 | target/arm: Honor the HCR_EL2.TSW bit | Richard Henderson | 1 | -6/+16 |
2020-03-05 | target/arm: Honor the HCR_EL2.{TVM,TRVM} bits | Richard Henderson | 1 | -27/+55 |
2020-03-05 | target/arm: Improve masking in arm_hcr_el2_eff | Richard Henderson | 1 | -4/+27 |
2020-03-05 | target/arm: Improve masking of HCR/HCR2 RES0 bits | Richard Henderson | 1 | -13/+25 |
2020-03-05 | target/arm: Implement (trivially) ARMv8.2-TTCNP | Peter Maydell | 1 | -0/+4 |
2020-02-28 | target/arm: Implement ARMv8.3-CCIDX | Peter Maydell | 1 | -0/+19 |
2020-02-28 | target/arm: Add isar_feature_aa32_vfp_simd | Richard Henderson | 1 | -2/+2 |
2020-02-21 | target/arm: Use isar_feature_aa32_simd_r32 more places | Richard Henderson | 1 | -7/+6 |
2020-02-21 | target/arm: Correctly implement ACTLR2, HACTLR2 | Peter Maydell | 1 | -9/+23 |
2020-02-21 | target/arm: Use isar_feature function for testing AA32HPD feature | Peter Maydell | 1 | -2/+2 |
2020-02-21 | target/arm: Test correct register in aa32_pan and aa32_ats1e1 checks | Peter Maydell | 1 | -6/+6 |
2020-02-21 | target/arm: Correct handling of PMCR_EL0.LC bit | Peter Maydell | 1 | -4/+9 |
2020-02-21 | target/arm: Correct definition of PMCRDP | Peter Maydell | 1 | -1/+2 |
2020-02-21 | target/arm: Implement ARMv8.4-PMU extension | Peter Maydell | 1 | -1/+21 |
2020-02-21 | target/arm: Implement ARMv8.1-PMU extension | Peter Maydell | 1 | -2/+30 |
2020-02-21 | target/arm: Move DBGDIDR into ARMISARegisters | Peter Maydell | 1 | -1/+1 |
2020-02-21 | target/arm: Stop assuming DBGDIDR always exists | Peter Maydell | 1 | -16/+5 |
2020-02-21 | target/arm: Add _aa64_ and _any_ versions of pmu_8_1 isar checks | Peter Maydell | 1 | -5/+7 |
2020-02-21 | target/arm: Define an aa32_pmu_8_1 isar feature test function | Peter Maydell | 1 | -3/+2 |
2020-02-21 | target/arm: Add and use FIELD definitions for ID_AA64DFR0_EL1 | Peter Maydell | 1 | -3/+3 |
2020-02-21 | target/arm: Factor out PMU register definitions | Peter Maydell | 1 | -76/+82 |
2020-02-21 | target/arm: Define and use any_predinv isar_feature test | Peter Maydell | 1 | -8/+1 |
2020-02-21 | target/arm: Check aa32_pan in take_aarch32_exception(), not aa64_pan | Peter Maydell | 1 | -1/+1 |