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path: root/target/arm/helper-mve.h
AgeCommit message (Expand)AuthorFilesLines
2021-07-02target/arm: Implement MVE shifts by registerPeter Maydell1-0/+2
2021-07-02target/arm: Implement MVE shifts by immediatePeter Maydell1-0/+3
2021-07-02target/arm: Implement MVE long shifts by registerPeter Maydell1-0/+6
2021-07-02target/arm: Implement MVE long shifts by immediatePeter Maydell1-0/+3
2021-07-02target/arm: Implement MVE VADDLVPeter Maydell1-0/+3
2021-07-02target/arm: Implement MVE VSHLCPeter Maydell1-0/+2
2021-07-02target/arm: Implement MVE saturating narrowing shiftsPeter Maydell1-0/+30
2021-07-02target/arm: Implement MVE VSHRN, VRSHRNPeter Maydell1-0/+10
2021-07-02target/arm: Implement MVE VSRI, VSLIPeter Maydell1-0/+8
2021-07-02target/arm: Implement MVE VSHLLPeter Maydell1-0/+9
2021-07-02target/arm: Implement MVE vector shift right by immediate insnsPeter Maydell1-0/+12
2021-07-02target/arm: Implement MVE vector shift left by immediate insnsPeter Maydell1-0/+16
2021-07-02target/arm: Implement MVE logical immediate insnsPeter Maydell1-0/+4
2021-06-24target/arm: Implement MVE VADDVPeter Maydell1-0/+7
2021-06-24target/arm: Implement MVE VHCADDPeter Maydell1-0/+8
2021-06-24target/arm: Implement MVE VCADDPeter Maydell1-0/+8
2021-06-24target/arm: Implement MVE VADC, VSBCPeter Maydell1-0/+5
2021-06-24target/arm: Implement MVE VRHADDPeter Maydell1-0/+8
2021-06-24target/arm: Implement MVE VQDMULL (vector)Peter Maydell1-0/+5
2021-06-24target/arm: Implement MVE VQDMLSDH and VQRDMLSDHPeter Maydell1-0/+16
2021-06-24target/arm: Implement MVE VQDMLADH and VQRDMLADHPeter Maydell1-0/+16
2021-06-24target/arm: Implement MVE VRSHLPeter Maydell1-0/+8
2021-06-24target/arm: Implement MVE VSHL insnPeter Maydell1-0/+8
2021-06-24target/arm: Implement MVE VQRSHLPeter Maydell1-0/+8
2021-06-24target/arm: Implement MVE VQSHL (vector)Peter Maydell1-0/+8
2021-06-24target/arm: Implement MVE VQADD, VQSUB (vector)Peter Maydell1-0/+16
2021-06-24target/arm: Implement MVE VQDMULH, VQRDMULH (vector)Peter Maydell1-0/+8
2021-06-24target/arm: Implement MVE VQDMULL scalarPeter Maydell1-0/+5
2021-06-24target/arm: Implement MVE VQDMULH and VQRDMULH (scalar)Peter Maydell1-0/+8
2021-06-24target/arm: Implement MVE VQADD and VQSUBPeter Maydell1-0/+16
2021-06-24target/arm: Implement MVE VBRSRPeter Maydell1-0/+4
2021-06-24target/arm: Implement MVE VHADD, VHSUB (scalar)Peter Maydell1-0/+16
2021-06-24target/arm: Implement MVE VSUB, VMUL (scalar)Peter Maydell1-0/+8
2021-06-24target/arm: Implement MVE VADD (scalar)Peter Maydell1-0/+4
2021-06-21target/arm: Implement MVE VRMLALDAVH, VRMLSLDAVHPeter Maydell1-0/+8
2021-06-21target/arm: Implement MVE VMLSLDAVPeter Maydell1-0/+5
2021-06-21target/arm: Implement MVE VMLALDAVPeter Maydell1-0/+8
2021-06-21target/arm: Implement MVE VMULLPeter Maydell1-0/+14
2021-06-21target/arm: Implement MVE VHADD, VHSUBPeter Maydell1-0/+14
2021-06-21target/arm: Implement MVE VABDPeter Maydell1-0/+7
2021-06-21target/arm: Implement MVE VMAX, VMINPeter Maydell1-0/+14
2021-06-21target/arm: Implement MVE VRMULHPeter Maydell1-0/+7
2021-06-21target/arm: Implement MVE VMULHPeter Maydell1-0/+7
2021-06-21target/arm: Implement MVE VADD, VSUB, VMULPeter Maydell1-0/+12
2021-06-21target/arm: Implement MVE VAND, VBIC, VORR, VORN, VEORPeter Maydell1-0/+6
2021-06-21target/arm: Implement MVE VDUPPeter Maydell1-0/+2
2021-06-21target/arm: Implement MVE VNEGPeter Maydell1-0/+6
2021-06-21target/arm: Implement MVE VABSPeter Maydell1-0/+6
2021-06-21target/arm: Implement MVE VMVN (register)Peter Maydell1-0/+2
2021-06-21target/arm: Implement MVE VREV16, VREV32, VREV64Peter Maydell1-0/+7