riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2017-10-06	target/arm: Factor out "get mmuidx for specified security state"	Peter Maydell	1	-11/+21
2017-10-06	target/arm: Fix calculation of secure mm_idx values	Peter Maydell	1	-5/+7
2017-10-06	nvic: Implement Security Attribution Unit registers	Peter Maydell	1	-0/+10
2017-10-06	target/arm: Add new-in-v8M SFSR and SFAR	Peter Maydell	1	-0/+12
2017-10-06	target/arm: Prepare for CONTROL.SPSEL being nonzero in Handler mode	Peter Maydell	1	-1/+7
2017-09-21	nvic: Support banked exceptions in acknowledge and complete	Peter Maydell	1	-2/+13
2017-09-21	target/arm: Handle banking in negative-execution-priority check in cpu_mmu_in...	Peter Maydell	1	-5/+16
2017-09-21	nvic: Make set_pending and clear_pending take a secure parameter	Peter Maydell	1	-1/+13
2017-09-21	nvic: Implement AIRCR changes for v8M	Peter Maydell	1	-0/+12
2017-09-19	arm: drop intermediate cpu_model -> cpu type parsing and use cpu type directly	Igor Mammedov	1	-0/+3
2017-09-14	target/arm: Use M_REG_NUM_BANKS rather than hardcoding 2	Peter Maydell	1	-16/+19
2017-09-07	target/arm: Add Jazelle feature	Portia Stephens	1	-0/+1
2017-09-07	target/arm: Implement BXNS, and banked stack pointers	Peter Maydell	1	-0/+13
2017-09-07	target/arm: Make CFSR register banked for v8M	Peter Maydell	1	-1/+6
2017-09-07	target/arm: Make MMFAR banked for v8M	Peter Maydell	1	-1/+1
2017-09-07	target/arm: Make CCR register banked for v8M	Peter Maydell	1	-1/+1
2017-09-07	target/arm: Make MPU_CTRL register banked for v8M	Peter Maydell	1	-1/+1
2017-09-07	target/arm: Make MPU_RNR register banked for v8M	Peter Maydell	1	-1/+1
2017-09-07	target/arm: Make MPU_RBAR, MPU_RLAR banked for v8M	Peter Maydell	1	-2/+2
2017-09-07	target/arm: Make MPU_MAIR0, MPU_MAIR1 registers banked for v8M	Peter Maydell	1	-2/+2
2017-09-07	target/arm: Make VTOR register banked for v8M	Peter Maydell	1	-1/+1
2017-09-07	target/arm: Make CONTROL register banked for v8M	Peter Maydell	1	-2/+3
2017-09-07	target/arm: Make FAULTMASK register banked for v8M	Peter Maydell	1	-2/+12
2017-09-07	target/arm: Make PRIMASK register banked for v8M	Peter Maydell	1	-1/+1
2017-09-07	target/arm: Make BASEPRI register banked for v8M	Peter Maydell	1	-1/+13
2017-09-07	target/arm: Add MMU indexes for secure v8M	Peter Maydell	1	-2/+17
2017-09-07	target/arm: Add state field, feature bit and migration for v8M secure state	Peter Maydell	1	-0/+3
2017-09-07	target/arm: Implement ARMv8M's PMSAv8 registers	Peter Maydell	1	-0/+13
2017-09-04	hw/arm/virt: add pmu interrupt state	Andrew Jones	1	-0/+2
2017-09-04	target/arm: Create and use new function arm_v7m_is_handler_mode()	Peter Maydell	1	-2/+8
2017-09-04	target/arm: Don't store M profile PRIMASK and FAULTMASK in daif	Peter Maydell	1	-1/+3
2017-09-04	target/arm: Define and use XPSR bit masks	Peter Maydell	1	-10/+28
2017-09-04	target/arm: Remove incorrect comment about MPU_CTRL	Peter Maydell	1	-1/+1
2017-09-01	arm: replace cpu_arm_init() with cpu_generic_init()	Igor Mammedov	1	-2/+1
2017-07-31	target/arm: Rename cp15.c6_rgnr to pmsav7.rnr	Peter Maydell	1	-2/+1
2017-07-11	ARM: KVM: Enable in-kernel timers with user space gic	Alexander Graf	1	-0/+3
2017-06-05	numa: move numa_node from CPUState into target specific classes	Igor Mammedov	1	-0/+2
2017-06-02	arm: Implement HFNMIENA support for M profile MPU	Peter Maydell	1	-1/+23
2017-06-02	arm: add MPU support to M profile CPUs	Michael Davidsaver	1	-0/+6
2017-06-02	arm: Clean up handling of no-MPU PMSA CPUs	Peter Maydell	1	-1/+1
2017-06-02	arm: Use different ARMMMUIdx values for M profile	Peter Maydell	1	-2/+19
2017-06-02	arm: Add support for M profile CPUs having different MMU index semantics	Peter Maydell	1	-14/+57
2017-05-11	hw/arm/virt: extract mp-affinity calculation in separate function	Igor Mammedov	1	-0/+2
2017-04-20	arm: Track M profile handler mode state in TB flags	Peter Maydell	1	-0/+9
2017-04-20	arm: Move excnames[] array into arm_log_exceptions()	Peter Maydell	1	-1/+1
2017-04-20	target/arm: Add missing entries to excnames[] for log strings	Peter Maydell	1	-0/+1
2017-03-14	target/arm/arm-powerctl: Fix psci info return values	Andrew Jones	1	-2/+2
2017-02-28	target-arm: Add GICv3CPUState in CPUARMState struct	Vijaya Kumar K	1	-0/+2
2017-02-28	armv7m: Raise correct kind of UsageFault for attempts to execute ARM code	Peter Maydell	1	-0/+1
2017-02-28	armv7m: Check exception return consistency	Peter Maydell	1	-1/+11