Age | Commit message (Expand) | Author | Files | Lines |
2021-06-03 | target/arm: Enable BFloat16 extensions | Richard Henderson | 1 | -0/+3 |
2021-06-03 | target/arm: Allow board models to specify initial NS VTOR | Peter Maydell | 1 | -0/+10 |
2021-05-26 | hw/core: Constify TCGCPUOps | Richard Henderson | 1 | -1/+1 |
2021-05-26 | cpu: Move CPUClass::get_phys_page_debug to SysemuCPUOps | Philippe Mathieu-Daudé | 1 | -1/+1 |
2021-05-26 | cpu: Move CPUClass::asidx_from_attrs to SysemuCPUOps | Philippe Mathieu-Daudé | 1 | -1/+1 |
2021-05-26 | cpu: Move CPUClass::write_elf* to SysemuCPUOps | Philippe Mathieu-Daudé | 1 | -2/+2 |
2021-05-26 | cpu: Move CPUClass::virtio_is_big_endian to SysemuCPUOps | Philippe Mathieu-Daudé | 1 | -1/+1 |
2021-05-26 | cpu: Move CPUClass::vmsd to SysemuCPUOps | Philippe Mathieu-Daudé | 1 | -1/+1 |
2021-05-26 | cpu: Introduce SysemuCPUOps structure | Philippe Mathieu-Daudé | 1 | -0/+8 |
2021-05-26 | cpu: Rename CPUClass vmsd -> legacy_vmsd | Philippe Mathieu-Daudé | 1 | -1/+1 |
2021-05-25 | target/arm: Enable SVE2 and related extensions | Richard Henderson | 1 | -0/+2 |
2021-05-02 | Do not include sysemu/sysemu.h if it's not really necessary | Thomas Huth | 1 | -1/+0 |
2021-03-23 | target/arm: Make M-profile VTOR loads on reset handle memory aliasing | Peter Maydell | 1 | -1/+1 |
2021-03-08 | target/arm: Restrict v7A TCG cpus to TCG accel | Philippe Mathieu-Daudé | 1 | -335/+0 |
2021-03-05 | target/arm/cpu: Update coding style to make checkpatch.pl happy | Philippe Mathieu-Daudé | 1 | -4/+8 |
2021-03-05 | target/arm: Restrict v8M IDAU to TCG | Philippe Mathieu-Daudé | 1 | -7/+0 |
2021-03-05 | target/arm: Set ID_PFR2.SSBS to 1 for "max" 32-bit CPU | Rebecca Cran | 1 | -0/+4 |
2021-02-16 | target/arm: Enable MTE for user-only | Richard Henderson | 1 | -0/+15 |
2021-02-16 | target/arm: Use the proper TBI settings for linux-user | Richard Henderson | 1 | -7/+3 |
2021-02-11 | target/arm: Set ID_PFR0.DIT to 1 for "max" 32-bit CPU | Rebecca Cran | 1 | -0/+4 |
2021-02-05 | cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass | Claudio Fontana | 1 | -15/+26 |
2021-02-05 | cpu: move debug_check_watchpoint to tcg_ops | Claudio Fontana | 1 | -2/+2 |
2021-02-05 | cpu: move adjust_watchpoint_address to tcg_ops | Claudio Fontana | 1 | -1/+1 |
2021-02-05 | cpu: move do_unaligned_access to tcg_ops | Claudio Fontana | 1 | -1/+1 |
2021-02-05 | cpu: move cc->transaction_failed to tcg_ops | Claudio Fontana | 1 | -2/+2 |
2021-02-05 | cpu: move cc->do_interrupt to tcg_ops | Claudio Fontana | 1 | -2/+2 |
2021-02-05 | cpu: Move debug_excp_handler to tcg_ops | Eduardo Habkost | 1 | -1/+1 |
2021-02-05 | cpu: Move tlb_fill to tcg_ops | Eduardo Habkost | 1 | -1/+1 |
2021-02-05 | cpu: Move cpu_exec_* to tcg_ops | Eduardo Habkost | 1 | -1/+1 |
2021-02-05 | cpu: Move synchronize_from_tb() to tcg_ops | Eduardo Habkost | 1 | -1/+3 |
2021-02-05 | cpu: Introduce TCGCpuOperations struct | Eduardo Habkost | 1 | -1/+1 |
2021-01-19 | target/arm: Implement SCR_EL2.EEL2 | Rémi Denis-Courmont | 1 | -1/+1 |
2021-01-19 | target/arm: remove redundant tests | Rémi Denis-Courmont | 1 | -4/+4 |
2021-01-19 | target/arm: Add cpu properties to control pauth | Richard Henderson | 1 | -0/+13 |
2021-01-08 | target/arm: Remove timer_del()/timer_deinit() before timer_free() | Peter Maydell | 1 | -2/+0 |
2021-01-07 | tcg: Make tb arg to synchronize_from_tb const | Richard Henderson | 1 | -1/+2 |
2020-12-10 | hw/intc/armv7m_nvic: Update FPDSCR masking for v8.1M | Peter Maydell | 1 | -0/+3 |
2020-12-10 | target/arm: Don't clobber ID_PFR1.Security on M-profile cores | Peter Maydell | 1 | -1/+1 |
2020-10-20 | target/arm: Implement FPSCR.LTPSIZE for M-profile LOB extension | Peter Maydell | 1 | -0/+9 |
2020-10-20 | target/arm: Fix has_vfp/has_neon ID reg squashing for M-profile | Peter Maydell | 1 | -12/+19 |
2020-10-08 | hw/arm/virt: Implement kvm-steal-time | Andrew Jones | 1 | -0/+8 |
2020-10-01 | target/arm: Move id_pfr0, id_pfr1 into ARMISARegisters | Peter Maydell | 1 | -10/+10 |
2020-10-01 | target/arm: Replace ARM_FEATURE_PXN with ID_MMFR0.VMSA check | Peter Maydell | 1 | -1/+0 |
2020-09-18 | target/arm: Set instance_align on CPUARM TypeInfo | Richard Henderson | 1 | -0/+2 |
2020-09-14 | target/arm: Remove no-longer-reachable 32-bit KVM code | Peter Maydell | 1 | -60/+53 |
2020-09-08 | target/arm: Move setting of CPU halted state to generic code | Thiago Jung Bauermann | 1 | -1/+0 |
2020-09-08 | target/arm: Move start-powered-off property to generic CPUState | Thiago Jung Bauermann | 1 | -3/+2 |
2020-09-01 | target/arm: Enable FP16 in '-cpu max' | Peter Maydell | 1 | -1/+2 |
2020-08-24 | target/arm: Implement FPST_STD_F16 fpstatus | Peter Maydell | 1 | -0/+3 |
2020-07-20 | hw/arm/virt: Enable MTE via a machine property | Richard Henderson | 1 | -8/+11 |