riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2020-06-23	target/arm: Check supported KVM features globally (not per vCPU)	Philippe Mathieu-Daudé	1	-1/+1
2020-06-16	target/arm/cpu: adjust virtual time for all KVM arm cpus	fangying	1	-2/+4
2020-05-15	qom: Drop parameter @errp of object_property_add() & friends	Markus Armbruster	1	-7/+4
2020-05-11	target/arm: Restrict TCG cpus to TCG accel	Philippe Mathieu-Daudé	1	-634/+0
2020-05-11	target/arm/cpu: Restrict v8M IDAU interface to Aarch32 CPUs	Philippe Mathieu-Daudé	1	-1/+1
2020-05-11	target/arm/cpu: Use ARRAY_SIZE() to iterate over ARMCPUInfo[]	Philippe Mathieu-Daudé	1	-7/+9
2020-05-11	target/arm: Make set_feature() available for other files	Thomas Huth	1	-10/+0
2020-05-04	target/arm: Use uint64_t for midr field in CPU state struct	Philippe Mathieu-Daudé	1	-1/+1
2020-05-04	target/arm: Implement ARMv8.2-TTS2UXN	Peter Maydell	1	-0/+1
2020-04-30	target/arm/cpu: Update coding style to make checkpatch.pl happy	Philippe Mathieu-Daudé	1	-3/+6
2020-04-30	target/arm: Make cpu_register() available for other files	Thomas Huth	1	-8/+2
2020-03-19	Merge remote-tracking branch 'remotes/ehabkost/tags/x86-and-machine-pull-requ...	Peter Maydell	1	-4/+4
2020-03-18	Merge remote-tracking branch 'remotes/stsquad/tags/pull-testing-and-gdbstub-1...	Peter Maydell	1	-3/+4
2020-03-17	cpu: Use DeviceClass reset instead of a special CPUClass reset	Peter Maydell	1	-4/+4
2020-03-17	target/arm: default SVE length to 64 bytes for linux-user	Alex Bennée	1	-3/+4
2020-03-16	qom/object: Use common get/set uint helpers	Felipe Franciosi	1	-19/+3
2020-03-05	target/arm: Remove EL2 and EL3 setup from user-only	Richard Henderson	1	-6/+0
2020-03-05	target/arm: Disable has_el2 and has_el3 for user-only	Richard Henderson	1	-2/+4
2020-03-05	target/arm: Implement (trivially) ARMv8.2-TTCNP	Peter Maydell	1	-0/+1
2020-02-28	target/arm: Remove ARM_FEATURE_VFP*	Richard Henderson	1	-25/+0
2020-02-28	target/arm: Replace ARM_FEATURE_VFP4 with isar_feature_aa32_simdfmac	Richard Henderson	1	-1/+5
2020-02-28	target/arm: Add isar_feature_aa64_fp_simd, isar_feature_aa32_vfp	Richard Henderson	1	-3/+6
2020-02-28	target/arm: Add isar_feature_aa32_vfp_simd	Richard Henderson	1	-2/+2
2020-02-21	target/arm: Set MVFR0.FPSP for ARMv5 cpus	Richard Henderson	1	-4/+6
2020-02-21	target/arm: Use isar_feature_aa32_simd_r32 more places	Richard Henderson	1	-5/+4
2020-02-21	target/arm: Correctly implement ACTLR2, HACTLR2	Peter Maydell	1	-0/+1
2020-02-21	target/arm: Test correct register in aa32_pan and aa32_ats1e1 checks	Peter Maydell	1	-52/+52
2020-02-21	target/arm: Move DBGDIDR into ARMISARegisters	Peter Maydell	1	-4/+4
2020-02-21	target/arm: Add _aa64_ and _any_ versions of pmu_8_1 isar checks	Peter Maydell	1	-1/+2
2020-02-21	target/arm: Define an aa32_pmu_8_1 isar feature test function	Peter Maydell	1	-14/+14
2020-02-21	target/arm: Use FIELD macros for clearing ID_DFR0 PERFMON field	Peter Maydell	1	-1/+1
2020-02-21	target/arm: Add and use FIELD definitions for ID_AA64DFR0_EL1	Peter Maydell	1	-1/+1
2020-02-21	target/arm: Add _aa32_ to isar_feature functions testing 32-bit ID registers	Peter Maydell	1	-2/+4
2020-02-13	target/arm: Enable ARMv8.2-ATS1E1 in -cpu max	Richard Henderson	1	-0/+4
2020-02-07	target/arm: Raise only one interrupt in arm_cpu_exec_interrupt	Richard Henderson	1	-18/+12
2020-02-07	target/arm: Use bool for unmasked in arm_excp_unmasked	Richard Henderson	1	-3/+3
2020-02-07	target/arm: Pass more cpu state to arm_excp_unmasked	Richard Henderson	1	-10/+12
2020-02-07	target/arm: Move arm_excp_unmasked to cpu.c	Richard Henderson	1	-0/+119
2020-02-07	target/arm: Add the hypervisor virtual counter	Richard Henderson	1	-1/+2
2020-01-30	target/arm/cpu: Add the kvm-no-adjvtime CPU property	Andrew Jones	1	-0/+2
2020-01-27	Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging	Peter Maydell	1	-27/+14
2020-01-24	qdev: set properties with device_class_set_props()	Marc-André Lureau	1	-1/+1
2020-01-24	qdev: remove extraneous error	Marc-André Lureau	1	-24/+12
2020-01-24	cpu: Use cpu_class_set_parent_reset()	Greg Kurz	1	-2/+1
2020-01-23	target/arm: add PMU feature to cortex-r5 and cortex-r5f	Clement Deschamps	1	-0/+1
2019-12-20	target/arm: Prepare generic timer for per-platform CNTFRQ	Andrew Jeffery	1	-10/+51
2019-12-20	target/arm: Abstract the generic timer frequency	Andrew Jeffery	1	-0/+8
2019-12-16	target/arm: Add support for cortex-m7 CPU	Christophe Lyon	1	-0/+33
2019-11-01	target/arm/kvm: host cpu: Add support for sve<N> properties	Andrew Jones	1	-0/+3
2019-11-01	target/arm/cpu64: max cpu: Introduce sve<N> properties	Andrew Jones	1	-0/+19