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path: root/target/arm/cpu.c
AgeCommit message (Expand)AuthorFilesLines
2022-10-20target/arm: Enable TARGET_TB_PCRELRichard Henderson1-11/+12
2022-10-04accel/tcg: Introduce tb_pc and log_pcRichard Henderson1-2/+2
2022-10-04hw/core: Add CPUClass.get_pcRichard Henderson1-0/+13
2022-08-12target/arm: Don't report Statistical Profiling Extension in ID registersPeter Maydell1-0/+11
2022-07-18target/arm: Store TCR_EL* registers as uint64_tPeter Maydell1-1/+1
2022-07-11target/arm: Enable SME for user-onlyRichard Henderson1-0/+11
2022-07-11target/arm: Only set ZEN in reset if SVE presentRichard Henderson1-4/+3
2022-07-11target/arm: Handle SME in aarch64_cpu_dump_stateRichard Henderson1-1/+16
2022-07-05disas: Remove libvixl disassemblerThomas Huth1-7/+0
2022-06-27target/arm: Add cpu properties for SMERichard Henderson1-3/+11
2022-06-27target/arm: Move arm_cpu_*_finalize to internals.hRichard Henderson1-0/+2
2022-06-27target/arm: Catch invalid kvm state also for hvfAlexander Graf1-4/+12
2022-06-08target/arm: Rename sve_zcr_len_for_el to sve_vqm1_for_elRichard Henderson1-1/+1
2022-06-08target/arm: Do not use aarch64_sve_zcr_get_valid_len in resetRichard Henderson1-2/+1
2022-05-19target/arm: Use FIELD definitions for CPACR, CPTR_ELxRichard Henderson1-3/+8
2022-05-09Merge tag 'pull-target-arm-20220509' of https://git.linaro.org/people/pmaydel...Richard Henderson1-10/+56
2022-05-09target/arm: Enable FEAT_CSV2_2 for -cpu maxRichard Henderson1-0/+5
2022-05-09target/arm: Implement virtual SError exceptionsRichard Henderson1-1/+37
2022-05-09target/arm: Enable FEAT_Debugv8p2 for -cpu maxRichard Henderson1-0/+1
2022-05-09target/arm: Use field names for manipulating EL2 and EL3 modesRichard Henderson1-9/+13
2022-05-09disas: Remove old libopcode arm disassemblerThomas Huth1-8/+0
2022-05-05target/arm: Merge allocation of the cpreg and its nameRichard Henderson1-15/+1
2022-05-05target/arm: Store cpregs key in the hash table directlyRichard Henderson1-2/+2
2022-05-05target/arm: Reorg ARMCPRegInfo type field bitsRichard Henderson1-2/+2
2022-05-05target/arm: Split out cpregs.hRichard Henderson1-0/+1
2022-05-05target/arm: Enable SCTLR_EL1.BT0 for aarch64-linux-userRichard Henderson1-0/+2
2022-04-28target/arm: Disable cryptographic instructions when neon is disabledDamien Hedde1-0/+9
2022-04-22target/arm: Change CPUArchState.thumb to boolRichard Henderson1-1/+1
2022-04-22target/arm: Change CPUArchState.aarch64 to boolRichard Henderson1-1/+1
2022-04-22target/arm/cpu.c: ignore VIRQ and VFIQ if no EL2Peter Maydell1-2/+10
2022-04-06include: move target page bits declaration to page-vary.hMarc-André Lureau1-1/+1
2022-04-06Replace TARGET_WORDS_BIGENDIANMarc-André Lureau1-1/+1
2022-03-18target/arm: Make rvbar settable after realizeEdgar E. Iglesias1-5/+7
2022-03-18target/arm: Log M-profile vector table accessesPeter Maydell1-0/+5
2022-03-07target/arm: Provide cpu property for controling FEAT_LPA2Richard Henderson1-0/+6
2022-03-02target/arm: Set TCR_EL1.TSZ for user-onlyRichard Henderson1-1/+2
2022-03-02target/arm: Support PSCI 1.1 and SMCCC 1.0Akihiko Odaki1-2/+3
2022-02-22Merge remote-tracking branch 'remotes/thuth-gitlab/tags/pull-request-2022-02-...Peter Maydell1-0/+1
2022-02-21target/arm: Move '-cpu host' code to cpu64.cPeter Maydell1-30/+0
2022-02-21target: Add missing "qemu/timer.h" includePhilippe Mathieu-Daudé1-0/+1
2022-02-08target/arm: make psci-conduit settable after realizePeter Maydell1-1/+5
2022-01-20hw/arm/virt: KVM: Enable PAuth when supported by the hostMarc Zyngier1-11/+5
2021-11-02target/arm: Implement arm_cpu_record_sigbusRichard Henderson1-0/+1
2021-11-02target/arm: Implement arm_cpu_record_sigsegvRichard Henderson1-2/+4
2021-09-21hvf: arm: Implement PSCI handlingAlexander Graf1-2/+2
2021-09-21hvf: arm: Implement -cpu hostPeter Maydell1-4/+9
2021-09-20target/arm: Consolidate ifdef blocks in resetPeter Maydell1-12/+10
2021-09-20target/arm: Always clear exclusive monitor on resetPeter Maydell1-3/+3
2021-09-20target/arm: Don't skip M-profile reset entirely in user modePeter Maydell1-0/+19
2021-09-14target/arm: Restrict cpu_exec_interrupt() handler to sysemuPhilippe Mathieu-Daudé1-2/+5