riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2020-02-13	target/arm: Enable ARMv8.2-ATS1E1 in -cpu max	Richard Henderson	1	-0/+4
2020-02-07	target/arm: Raise only one interrupt in arm_cpu_exec_interrupt	Richard Henderson	1	-18/+12
2020-02-07	target/arm: Use bool for unmasked in arm_excp_unmasked	Richard Henderson	1	-3/+3
2020-02-07	target/arm: Pass more cpu state to arm_excp_unmasked	Richard Henderson	1	-10/+12
2020-02-07	target/arm: Move arm_excp_unmasked to cpu.c	Richard Henderson	1	-0/+119
2020-02-07	target/arm: Add the hypervisor virtual counter	Richard Henderson	1	-1/+2
2020-01-30	target/arm/cpu: Add the kvm-no-adjvtime CPU property	Andrew Jones	1	-0/+2
2020-01-27	Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging	Peter Maydell	1	-27/+14
2020-01-24	qdev: set properties with device_class_set_props()	Marc-André Lureau	1	-1/+1
2020-01-24	qdev: remove extraneous error	Marc-André Lureau	1	-24/+12
2020-01-24	cpu: Use cpu_class_set_parent_reset()	Greg Kurz	1	-2/+1
2020-01-23	target/arm: add PMU feature to cortex-r5 and cortex-r5f	Clement Deschamps	1	-0/+1
2019-12-20	target/arm: Prepare generic timer for per-platform CNTFRQ	Andrew Jeffery	1	-10/+51
2019-12-20	target/arm: Abstract the generic timer frequency	Andrew Jeffery	1	-0/+8
2019-12-16	target/arm: Add support for cortex-m7 CPU	Christophe Lyon	1	-0/+33
2019-11-01	target/arm/kvm: host cpu: Add support for sve<N> properties	Andrew Jones	1	-0/+3
2019-11-01	target/arm/cpu64: max cpu: Introduce sve<N> properties	Andrew Jones	1	-0/+19
2019-11-01	target/arm: Allow SVE to be disabled via a CPU property	Andrew Jones	1	-1/+2
2019-10-24	target/arm: Rebuild hflags at EL changes	Richard Henderson	1	-0/+1
2019-10-15	intc/arm_gic: Support IRQ injection for more than 256 vpus	Eric Auger	1	-6/+4
2019-08-16	target/arm/cpu: Ensure we can use the pmu with kvm	Andrew Jones	1	-5/+25
2019-08-02	target/arm: Avoid bogus NSACR traps on M-profile without Security Extension	Peter Maydell	1	-0/+8
2019-07-22	target/arm: Limit ID register assertions to TCG	Peter Maydell	1	-2/+5
2019-07-15	target/arm: Set VFP-related MVFR0 fields for arm926 and arm1026	Peter Maydell	1	-0/+12
2019-07-15	target/arm: report ARMv8-A FP support for AArch32 -cpu max	Alex Bennée	1	-0/+4
2019-07-05	hw/arm: Replace global smp variables with machine smp properties	Like Xu	1	-1/+7
2019-07-04	target/arm: Move debug routines to debug_helper.c	Philippe Mathieu-Daudé	1	-6/+3
2019-07-01	target/arm: Move TLB related routines to tlb_helper.c	Philippe Mathieu-Daudé	1	-2/+4
2019-07-01	target/arm: Move CPU state dumping routines to cpu.c	Philippe Mathieu-Daudé	1	-0/+226
2019-06-17	target/arm: Allow M-profile CPUs to disable the DSP extension via CPU property	Peter Maydell	1	-0/+29
2019-06-17	target/arm: Allow VFP and Neon to be disabled via a CPU property	Peter Maydell	1	-6/+144
2019-06-13	target/arm: Explicitly enable VFP short-vectors for aarch32 -cpu max	Peter Maydell	1	-0/+4
2019-06-13	target/arm: Fix Cortex-R5F MVFR values	Peter Maydell	1	-0/+2
2019-06-12	Include qemu-common.h exactly where needed	Markus Armbruster	1	-0/+1
2019-06-12	Include qemu/module.h where needed, drop it from qemu-common.h	Markus Armbruster	1	-0/+1
2019-06-11	qemu-common: Move tcg_enabled() etc. to sysemu/tcg.h	Markus Armbruster	1	-1/+1
2019-06-10	cpu: Introduce cpu_set_cpustate_pointers	Richard Henderson	1	-2/+1
2019-05-23	arm: Remove unnecessary includes of hw/arm/arm.h	Peter Maydell	1	-1/+0
2019-05-10	target/arm: Convert to CPUClass::tlb_fill	Richard Henderson	1	-20/+2
2019-04-29	target/arm: Enable FPU for Cortex-M4 and Cortex-M33	Peter Maydell	1	-0/+8
2019-04-29	target/arm: Overlap VECSTRIDE and XSCALE_CPAR TB flags	Peter Maydell	1	-0/+7
2019-04-29	target/arm: Implement dummy versions of M-profile FP-related registers	Peter Maydell	1	-0/+5
2019-04-18	target: Simplify how the TARGET_cpu_list() print	Markus Armbruster	1	-1/+0
2019-03-26	target/arm: Set SIMDMISC and FPMISC for 32-bit -cpu max	Richard Henderson	1	-0/+5
2019-03-25	target/arm: cortex-a7 and cortex-a15 have pmus	Andrew Jones	1	-0/+3
2019-03-05	target/arm: Implement ARMv8.0-PredInv	Richard Henderson	1	-0/+1
2019-03-05	target/arm: Implement ARMv8.0-SB	Richard Henderson	1	-0/+1
2019-02-28	target/arm: Enable ARMv8.2-FHM for -cpu max	Richard Henderson	1	-0/+1
2019-02-28	target/arm: Use MVFR1 feature bits to gate A32/T32 FP16 instructions	Peter Maydell	1	-2/+0
2019-02-28	target/arm/cpu: Allow init-svtor property to be set after realize	Peter Maydell	1	-5/+24