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AgeCommit message (Expand)AuthorFilesLines
2012-12-08target-xtensa: restrict available SRs by enabled optionsMax Filippov3-105/+130
2012-12-08target-xtensa: implement CACHEATTR SRMax Filippov5-1/+25
2012-12-08target-xtensa: implement ATOMCTL SRMax Filippov7-14/+131
2012-12-08TCG: Use gen_opc_instr_start from context instead of global variable.Evgeny Voevodin1-2/+2
2012-12-08TCG: Use gen_opc_icount from context instead of global variable.Evgeny Voevodin1-1/+1
2012-12-08TCG: Use gen_opc_pc from context instead of global variable.Evgeny Voevodin1-2/+2
2012-11-17TCG: Use gen_opc_buf from context instead of global variable.Evgeny Voevodin1-2/+2
2012-11-17TCG: Use gen_opc_ptr from context instead of global variable.Evgeny Voevodin1-3/+3
2012-11-10target-xtensa: avoid using cpu_single_envBlue Swirl1-5/+5
2012-10-31cpus: Pass CPUState to [qemu_]cpu_has_work()Andreas Färber1-1/+3
2012-10-28target-xtensa: rename helper flagsAurelien Jarno1-8/+8
2012-10-23Rename target_phys_addr_t to hwaddrAvi Kivity2-4/+4
2012-10-06target-xtensa: de-optimize EXTUIAurelien Jarno1-20/+2
2012-09-27Emit debug_insn for CPU_LOG_TB_OP_OPT as well.Richard Henderson1-1/+1
2012-09-22target-xtensa: implement coprocessor context optionMax Filippov2-0/+43
2012-09-22target-xtensa: implement FP1 groupMax Filippov3-1/+135
2012-09-22target-xtensa: implement FP0 conversionsMax Filippov3-0/+89
2012-09-22target-xtensa: implement FP0 arithmeticMax Filippov3-1/+104
2012-09-22target-xtensa: implement LSCX and LSCI groupsMax Filippov1-4/+54
2012-09-22target-xtensa: add FP registersMax Filippov4-7/+63
2012-09-22target-xtensa: handle boolean option in overlaysMax Filippov1-0/+1
2012-09-21target-xtensa: don't emit extra tcg_gen_goto_tbMax Filippov1-1/+3
2012-09-21target-xtensa: fix extui shift amountMax Filippov1-3/+21
2012-09-08target-xtensa: fix missing errno codes for mingw32Max Filippov1-0/+6
2012-09-05target-xtensa: convert host errno values to guestMax Filippov1-8/+98
2012-09-01target-xtensa: return ENOSYS for unimplemented simcallsMax Filippov1-0/+2
2012-08-09Merge branch 'x86cpu_qom_tcg_v2' of git://github.com/imammedo/qemuBlue Swirl1-7/+1
2012-08-09target-xtensa: make default CPU depend on target endiannessMax Filippov1-0/+6
2012-07-28target-xtensa: fix big-endian BBS/BBC implementationMax Filippov1-2/+14
2012-06-25target-xtensa: drop usage of prev_debug_excp_handlerIgor Mammedov1-7/+1
2012-06-10target-xtensa: switch to AREG0-free modeMax Filippov4-154/+151
2012-06-10target-xtensa: add attributes to helper functionsMax Filippov1-8/+8
2012-06-10target-xtensa: remove unnecessary include of dyngen-exec.hPeter Portante1-1/+0
2012-06-09target-xtensa: fix CCOUNT for conditional branchesMax Filippov1-0/+2
2012-06-09target-xtensa: control page table lookup explicitlyMax Filippov1-5/+5
2012-06-09target-xtensa: update autorefill TLB entries conditionallyMax Filippov3-27/+35
2012-06-09target-xtensa: extract TLB entry setting methodMax Filippov2-4/+14
2012-06-09target-xtensa: update EXCVADDR in case of page table lookupMax Filippov1-0/+1
2012-06-09target-xtensa: flush TLB page for new MMU mappingMax Filippov1-0/+1
2012-06-07build: move other target-*/ objects to nested Makefile.objsPaolo Bonzini1-1/+2
2012-06-07build: move libobj-y variable to nested Makefile.objsPaolo Bonzini1-0/+3
2012-06-07build: move obj-TARGET-y variables to nested Makefile.objsPaolo Bonzini2-0/+228
2012-06-04Kill off cpu_state_reset()Andreas Färber1-5/+0
2012-06-04target-xtensa: Let cpu_xtensa_init() return XtensaCPUAndreas Färber3-6/+16
2012-04-21target-xtensa: fix LOOPNEZ/LOOPGTZ translationMax Filippov1-1/+1
2012-04-15target-xtensa: add license to core-fsf.cMax Filippov1-0/+27
2012-04-15target-xtensa: add license to core-dc232b.cMax Filippov1-0/+27
2012-04-15target-xtensa: add dc233c coreMax Filippov3-0/+674
2012-04-14target-xtensa: fix tb invalidation for IBREAK and LOOPMax Filippov2-11/+20
2012-04-14Use uintptr_t for various op related functionsBlue Swirl1-5/+4
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