Age | Commit message (Expand) | Author | Files | Lines |
2013-03-03 | gen-icount.h: Rename gen_icount_start/end to gen_tb_start/end | Peter Maydell | 1 | -2/+2 |
2013-03-03 | cpu: Introduce ENV_OFFSET macros | Andreas Färber | 1 | -0/+1 |
2013-02-23 | target-xtensa: Use add2/sub2 for mac | Richard Henderson | 1 | -16/+13 |
2013-02-23 | target-xtensa: Use mul*2 for mul*hi | Richard Henderson | 1 | -14/+6 |
2013-02-16 | cpu: Add CPUArchState pointer to CPUState | Andreas Färber | 1 | -0/+2 |
2013-02-16 | target-xtensa: Move TCG initialization to XtensaCPU initfn | Andreas Färber | 3 | -13/+9 |
2013-02-16 | target-xtensa: Introduce QOM realizefn for XtensaCPU | Andreas Färber | 3 | -1/+18 |
2013-02-01 | target-xtensa: Mark as unmigratable | Andreas Färber | 3 | -39/+9 |
2012-12-22 | target-xtensa: fix search_pc for the last TB opcode | Max Filippov | 1 | -1/+5 |
2012-12-19 | softmmu: move include files to include/sysemu/ | Paolo Bonzini | 1 | -1/+1 |
2012-12-19 | misc: move include files to include/qemu/ | Paolo Bonzini | 7 | -7/+7 |
2012-12-19 | qom: move include files to include/qom/ | Paolo Bonzini | 1 | -1/+1 |
2012-12-19 | exec: move include files to include/exec/ | Paolo Bonzini | 8 | -19/+19 |
2012-12-19 | build: kill libdis, move disassemblers to disas/ | Paolo Bonzini | 1 | -1/+1 |
2012-12-16 | exec: refactor cpu_restore_state | Blue Swirl | 1 | -12/+2 |
2012-12-15 | target-xtensa: fix ITLB/DTLB page protection flags | Max Filippov | 1 | -1/+2 |
2012-12-08 | target-xtensa: use movcond where possible | Max Filippov | 1 | -50/+42 |
2012-12-08 | target-xtensa: implement MISC SR | Max Filippov | 3 | -0/+6 |
2012-12-08 | target-xtensa: better control rsr/wsr/xsr access to SRs | Max Filippov | 1 | -19/+30 |
2012-12-08 | target-xtensa: restrict available SRs by enabled options | Max Filippov | 3 | -105/+130 |
2012-12-08 | target-xtensa: implement CACHEATTR SR | Max Filippov | 5 | -1/+25 |
2012-12-08 | target-xtensa: implement ATOMCTL SR | Max Filippov | 7 | -14/+131 |
2012-12-08 | TCG: Use gen_opc_instr_start from context instead of global variable. | Evgeny Voevodin | 1 | -2/+2 |
2012-12-08 | TCG: Use gen_opc_icount from context instead of global variable. | Evgeny Voevodin | 1 | -1/+1 |
2012-12-08 | TCG: Use gen_opc_pc from context instead of global variable. | Evgeny Voevodin | 1 | -2/+2 |
2012-11-17 | TCG: Use gen_opc_buf from context instead of global variable. | Evgeny Voevodin | 1 | -2/+2 |
2012-11-17 | TCG: Use gen_opc_ptr from context instead of global variable. | Evgeny Voevodin | 1 | -3/+3 |
2012-11-10 | target-xtensa: avoid using cpu_single_env | Blue Swirl | 1 | -5/+5 |
2012-10-31 | cpus: Pass CPUState to [qemu_]cpu_has_work() | Andreas Färber | 1 | -1/+3 |
2012-10-28 | target-xtensa: rename helper flags | Aurelien Jarno | 1 | -8/+8 |
2012-10-23 | Rename target_phys_addr_t to hwaddr | Avi Kivity | 2 | -4/+4 |
2012-10-06 | target-xtensa: de-optimize EXTUI | Aurelien Jarno | 1 | -20/+2 |
2012-09-27 | Emit debug_insn for CPU_LOG_TB_OP_OPT as well. | Richard Henderson | 1 | -1/+1 |
2012-09-22 | target-xtensa: implement coprocessor context option | Max Filippov | 2 | -0/+43 |
2012-09-22 | target-xtensa: implement FP1 group | Max Filippov | 3 | -1/+135 |
2012-09-22 | target-xtensa: implement FP0 conversions | Max Filippov | 3 | -0/+89 |
2012-09-22 | target-xtensa: implement FP0 arithmetic | Max Filippov | 3 | -1/+104 |
2012-09-22 | target-xtensa: implement LSCX and LSCI groups | Max Filippov | 1 | -4/+54 |
2012-09-22 | target-xtensa: add FP registers | Max Filippov | 4 | -7/+63 |
2012-09-22 | target-xtensa: handle boolean option in overlays | Max Filippov | 1 | -0/+1 |
2012-09-21 | target-xtensa: don't emit extra tcg_gen_goto_tb | Max Filippov | 1 | -1/+3 |
2012-09-21 | target-xtensa: fix extui shift amount | Max Filippov | 1 | -3/+21 |
2012-09-08 | target-xtensa: fix missing errno codes for mingw32 | Max Filippov | 1 | -0/+6 |
2012-09-05 | target-xtensa: convert host errno values to guest | Max Filippov | 1 | -8/+98 |
2012-09-01 | target-xtensa: return ENOSYS for unimplemented simcalls | Max Filippov | 1 | -0/+2 |
2012-08-09 | Merge branch 'x86cpu_qom_tcg_v2' of git://github.com/imammedo/qemu | Blue Swirl | 1 | -7/+1 |
2012-08-09 | target-xtensa: make default CPU depend on target endianness | Max Filippov | 1 | -0/+6 |
2012-07-28 | target-xtensa: fix big-endian BBS/BBC implementation | Max Filippov | 1 | -2/+14 |
2012-06-25 | target-xtensa: drop usage of prev_debug_excp_handler | Igor Mammedov | 1 | -7/+1 |
2012-06-10 | target-xtensa: switch to AREG0-free mode | Max Filippov | 4 | -154/+151 |