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path: root/target-xtensa/helper.c
AgeCommit message (Expand)AuthorFilesLines
2014-09-25target-xtensa: Use cpu_exec_interrupt qom hookRichard Henderson1-0/+10
2014-09-12cpu-exec: Make debug_excp_handler a QOM CPU methodPeter Maydell1-2/+3
2014-03-13cpu-exec: Change cpu_resume_from_signal() argument to CPUStateAndreas Färber1-1/+1
2014-03-13cpu: Move watchpoint fields from CPU_COMMON to CPUStateAndreas Färber1-3/+5
2014-03-13cpu: Move exception_index field from CPU_COMMON to CPUStateAndreas Färber1-9/+11
2014-03-13target-xtensa: Clean up ENV_GET_CPU() usageAndreas Färber1-1/+1
2014-02-11exec: Make ldl_*_phys input an AddressSpaceEdgar E. Iglesias1-1/+2
2013-07-26cpu: Introduce CPUState::gdb_num_regs and CPUClass::gdb_num_core_regsAndreas Färber1-0/+8
2013-07-26target-xtensa: Introduce XtensaCPU subclassesAndreas Färber1-11/+21
2013-07-23cpu: Turn cpu_get_phys_page_debug() into a CPUClass hookAndreas Färber1-3/+4
2013-03-12cpu: Replace do_interrupt() by CPUClass::do_interrupt methodAndreas Färber1-1/+4
2013-02-16target-xtensa: Move TCG initialization to XtensaCPU initfnAndreas Färber1-13/+1
2013-02-16target-xtensa: Introduce QOM realizefn for XtensaCPUAndreas Färber1-1/+3
2012-12-19misc: move include files to include/qemu/Paolo Bonzini1-1/+1
2012-12-19exec: move include files to include/exec/Paolo Bonzini1-2/+2
2012-12-15target-xtensa: fix ITLB/DTLB page protection flagsMax Filippov1-1/+2
2012-12-08target-xtensa: implement CACHEATTR SRMax Filippov1-1/+20
2012-12-08target-xtensa: implement ATOMCTL SRMax Filippov1-14/+42
2012-10-23Rename target_phys_addr_t to hwaddrAvi Kivity1-1/+1
2012-06-25target-xtensa: drop usage of prev_debug_excp_handlerIgor Mammedov1-7/+1
2012-06-09target-xtensa: control page table lookup explicitlyMax Filippov1-5/+5
2012-06-09target-xtensa: update autorefill TLB entries conditionallyMax Filippov1-24/+32
2012-06-09target-xtensa: update EXCVADDR in case of page table lookupMax Filippov1-0/+1
2012-06-04Kill off cpu_state_reset()Andreas Färber1-5/+0
2012-06-04target-xtensa: Let cpu_xtensa_init() return XtensaCPUAndreas Färber1-2/+2
2012-04-14target-xtensa: Start QOM'ifying CPU initAndreas Färber1-1/+0
2012-04-14target-xtensa: QOM'ify CPU resetAndreas Färber1-13/+2
2012-04-14target-xtensa: QOM'ify CPUAndreas Färber1-1/+3
2012-03-14target-xtensa: Don't overuse CPUStateAndreas Färber1-20/+20
2012-03-14Rename cpu_reset() to cpu_state_reset()Andreas Färber1-1/+1
2012-03-03Merge branch 'upstream' of git://qemu.weilnetz.de/qemuBlue Swirl1-1/+0
2012-02-28target-xtensa: Clean includesStefan Weil1-1/+0
2012-02-20target-xtensa: add DBREAK data breakpointsMax Filippov1-0/+41
2012-02-18target-xtensa: implement instruction breakpointsMax Filippov1-0/+2
2012-02-18target-xtensa: implement info tlb monitor commandMax Filippov1-0/+67
2011-11-26target-xtensa: fix MMUv3 initializationMax Filippov1-1/+1
2011-10-16target-xtensa: extract core configuration from overlayMax Filippov1-13/+14
2011-10-16target-xtensa: remove hand-written xtensa cores implementationsMax Filippov1-224/+2
2011-09-10target-xtensa: add dc232b core and boardMax Filippov1-0/+168
2011-09-10target-xtensa: implement memory protection optionsMax Filippov1-1/+339
2011-09-10target-xtensa: add gdb supportMax Filippov1-0/+11
2011-09-10target-xtensa: implement relocatable vectorsMax Filippov1-2/+16
2011-09-10target-xtensa: implement interrupt optionMax Filippov1-1/+97
2011-09-10target-xtensa: implement unaligned exception optionMax Filippov1-1/+3
2011-09-10target-xtensa: implement extended L32RMax Filippov1-0/+1
2011-09-10target-xtensa: implement windowed registersMax Filippov1-0/+1
2011-09-10target-xtensa: implement exceptionsMax Filippov1-1/+36
2011-09-10target-xtensa: add PS register and access controlMax Filippov1-0/+1
2011-09-10target-xtensa: implement disas_xtensa_insnMax Filippov1-2/+25
2011-09-10target-xtensa: add target stubsMax Filippov1-0/+73
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