Age | Commit message (Expand) | Author | Files | Lines |
2016-07-12 | target-*: Clean up cpu.h header guards | Markus Armbruster | 1 | -2/+2 |
2016-07-12 | Fix confusing argument names in some common functions | Sergey Sorokin | 1 | -1/+2 |
2016-06-29 | target-*: Don't redefine cpu_exec() | Peter Crosthwaite | 1 | -2/+0 |
2016-05-19 | cpu: move exec-all.h inclusion out of cpu.h | Paolo Bonzini | 1 | -1/+0 |
2016-05-19 | target-xtensa: make cpu-qom.h not target specific | Paolo Bonzini | 1 | -3/+38 |
2016-05-12 | tb: consistently use uint32_t for tb->flags | Emilio G. Cota | 1 | -1/+1 |
2016-02-23 | all: Clean up includes | Peter Maydell | 1 | -1/+0 |
2015-10-21 | target-xtensa: implement depbits instruction | Max Filippov | 1 | -0/+1 |
2015-10-07 | target-*: Drop cpu_gen_code define | Richard Henderson | 1 | -1/+0 |
2015-09-25 | xtensa: Remove ELF_MACHINE from cpu.h | Peter Crosthwaite | 1 | -1/+0 |
2015-09-11 | tlb: Add "ifetch" argument to cpu_mmu_index() | Benjamin Herrenschmidt | 1 | -1/+1 |
2015-07-09 | cpu-exec: Purge all uses of ENV_GET_CPU() | Peter Crosthwaite | 1 | -1/+1 |
2015-07-06 | target-xtensa: fix gdb register map construction | Max Filippov | 1 | -0/+1 |
2015-07-06 | target-xtensa: add 64-bit floating point registers | Max Filippov | 1 | -1/+17 |
2015-03-10 | cpu: Make cpu_init() return QOM CPUState object | Eduardo Habkost | 1 | -8/+1 |
2015-01-20 | exec.c: Drop TARGET_HAS_ICE define and checks | Peter Maydell | 1 | -2/+0 |
2014-12-17 | target-xtensa: record available window in TB flags | Max Filippov | 1 | -0/+12 |
2014-11-10 | target-xtensa: add missing window check for entry | Max Filippov | 1 | -0/+6 |
2014-11-03 | target-xtensa: add definition for XTHAL_INTTYPE_PROFILING | Max Filippov | 1 | -0/+1 |
2014-09-12 | cpu-exec: Make debug_excp_handler a QOM CPU method | Peter Maydell | 1 | -1/+1 |
2014-06-05 | softmmu: move ALIGNED_ONLY to cpu.h | Paolo Bonzini | 1 | -0/+1 |
2014-03-13 | cpu: Move watchpoint fields from CPU_COMMON to CPUState | Andreas Färber | 1 | -1/+1 |
2014-03-13 | cpu: Turn cpu_has_work() into a CPUClass hook | Andreas Färber | 1 | -7/+0 |
2014-03-13 | target-xtensa: Clean up ENV_GET_CPU() usage | Andreas Färber | 1 | -1/+3 |
2014-02-24 | target-xtensa: provide HW confg ID registers | Max Filippov | 1 | -0/+4 |
2013-07-29 | target-xtensa: avoid double-stopping at breakpoints | Max Filippov | 1 | -0/+4 |
2013-07-23 | cpu: Introduce CPUClass::synchronize_from_tb() for cpu_pc_from_tb() | Andreas Färber | 1 | -5/+0 |
2013-03-12 | cpu: Replace do_interrupt() by CPUClass::do_interrupt method | Andreas Färber | 1 | -1/+0 |
2013-02-16 | target-xtensa: Move TCG initialization to XtensaCPU initfn | Andreas Färber | 1 | -0/+1 |
2012-12-19 | exec: move include files to include/exec/ | Paolo Bonzini | 1 | -3/+3 |
2012-12-08 | target-xtensa: implement MISC SR | Max Filippov | 1 | -0/+1 |
2012-12-08 | target-xtensa: restrict available SRs by enabled options | Max Filippov | 1 | -0/+1 |
2012-12-08 | target-xtensa: implement CACHEATTR SR | Max Filippov | 1 | -0/+2 |
2012-12-08 | target-xtensa: implement ATOMCTL SR | Max Filippov | 1 | -0/+10 |
2012-10-31 | cpus: Pass CPUState to [qemu_]cpu_has_work() | Andreas Färber | 1 | -1/+3 |
2012-09-22 | target-xtensa: implement coprocessor context option | Max Filippov | 1 | -0/+5 |
2012-09-22 | target-xtensa: add FP registers | Max Filippov | 1 | -0/+3 |
2012-08-09 | target-xtensa: make default CPU depend on target endianness | Max Filippov | 1 | -0/+6 |
2012-06-09 | target-xtensa: update autorefill TLB entries conditionally | Max Filippov | 1 | -1/+1 |
2012-06-09 | target-xtensa: extract TLB entry setting method | Max Filippov | 1 | -0/+3 |
2012-06-04 | target-xtensa: Let cpu_xtensa_init() return XtensaCPU | Andreas Färber | 1 | -3/+13 |
2012-04-14 | target-xtensa: QOM'ify CPU reset | Andreas Färber | 1 | -0/+1 |
2012-04-14 | target-xtensa: QOM'ify CPU | Andreas Färber | 1 | -0/+1 |
2012-03-14 | Rename CPUState -> CPUArchState | Andreas Färber | 1 | -1/+1 |
2012-03-14 | target-xtensa: Don't overuse CPUState | Andreas Färber | 1 | -22/+22 |
2012-02-20 | target-xtensa: add DBREAK data breakpoints | Max Filippov | 1 | -0/+12 |
2012-02-18 | target-xtensa: add ICOUNT SR and debug exception | Max Filippov | 1 | -0/+6 |
2012-02-18 | target-xtensa: implement instruction breakpoints | Max Filippov | 1 | -0/+9 |
2012-02-18 | target-xtensa: add DEBUGCAUSE SR and configuration | Max Filippov | 1 | -0/+15 |
2012-02-18 | target-xtensa: implement info tlb monitor command | Max Filippov | 1 | -0/+1 |