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target-tilegx
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Lines
2015-09-15
target-tilegx: Handle post-increment load and store instructions
Richard Henderson
1
-8
/
+86
2015-09-15
target-tilegx: Handle basic load and store instructions
Richard Henderson
1
-15
/
+115
2015-09-15
target-tilegx: Handle most bit manipulation instructions
Richard Henderson
3
-1
/
+79
2015-09-15
target-tilegx: Handle arithmetic instructions
Richard Henderson
1
-6
/
+90
2015-09-15
target-tilegx: Handle simple logical operations
Richard Henderson
1
-3
/
+96
2015-09-15
target-tilegx: Add TILE-Gx building files
Chen Gang
1
-0
/
+1
2015-09-15
target-tilegx: Generate SEGV properly
Richard Henderson
2
-1
/
+6
2015-09-15
target-tilegx: Framework for decoding bundles
Richard Henderson
1
-0
/
+1145
2015-09-15
target-tilegx: Add several helpers for instructions translation
Chen Gang
2
-0
/
+74
2015-09-15
target-tilegx: Add cpu basic features for linux-user
Chen Gang
2
-0
/
+345
2015-09-15
target-tilegx: Add special register information from Tilera Corporation
Chen Gang
1
-0
/
+216
2015-09-15
target-tilegx: Fix LDNA_ADD_IMM8_OPCODE_X1
Richard Henderson
1
-1
/
+1
2015-09-15
target-tilegx: Modify _SPECIAL_ opcodes
Richard Henderson
1
-2
/
+2
2015-09-15
target-tilegx: Modify opcode_tilegx.h to fit QEMU usage
Chen Gang
1
-110
/
+110
2015-09-15
target-tilegx: Add opcode basic implementation from Tilera Corporation
Chen Gang
1
-0
/
+1406
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