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target-sparc
Age
Commit message (
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Author
Files
Lines
2011-07-21
SPARC64: TTE bits cleanup
Tsuneo Saito
2
-16
/
+26
2011-07-20
Fix unassigned memory access handling
Blue Swirl
2
-8
/
+22
2011-07-20
SPARC64: treat UA2007 ASI_BLK_* as translating ASIs.
Tsuneo Saito
1
-1
/
+2
2011-07-20
SPARC64: add missing break on fmovdcc
Tsuneo Saito
1
-0
/
+1
2011-07-20
SPARC64: fix VIS1 SIMD signed compare instructions
Tsuneo Saito
3
-28
/
+31
2011-07-14
Sparc: fix FPU and AM enable checks for translation
Blue Swirl
2
-23
/
+35
2011-07-14
SPARC64: C99 comment fix for block-transfer ASIs
Tsuneo Saito
1
-14
/
+14
2011-07-14
SPARC64: Add JPS1 ASI_BLK_AIU[PS]L ASIs for ldfa and stfa
Tsuneo Saito
1
-0
/
+4
2011-07-14
SPARC64: Add UA2007 ASI_BLK_AIU[PS]L? ASIs for stfa
Tsuneo Saito
1
-1
/
+5
2011-07-14
SPARC64: Add UA2007 ASI_BLK_AIU[PS]L? ASIs for ldfa
Tsuneo Saito
1
-1
/
+5
2011-07-14
SPARC64: fp_disabled checks on stfa/stdfa/stqfa
Tsuneo Saito
1
-0
/
+9
2011-07-14
SPARC64: Implement stfa/stdfa/stqfa instrcutions properly
Tsuneo Saito
2
-6
/
+11
2011-07-14
SPARC64: fp_disabled checks on ldfa/lddfa/ldqfa
Tsuneo Saito
1
-0
/
+9
2011-07-14
SPARC64: Implement ldfa/lddfa/ldqfa instructions properly
Tsuneo Saito
1
-5
/
+11
2011-07-01
fix cpu_cc_src and cpu_cc_src2 corruption in udivx and sdivx
Artyom Tarasenko
1
-10
/
+22
2011-06-26
Remove exec-all.h include directives
Blue Swirl
3
-3
/
+1
2011-06-26
Move cpu_has_work and cpu_pc_from_tb to cpu.h
Blue Swirl
2
-14
/
+14
2011-06-26
exec.h: fix coding style and change cpu_has_work to return bool
Blue Swirl
1
-1
/
+1
2011-06-26
sparc: move do_interrupt to helper.c
Blue Swirl
4
-242
/
+256
2011-06-26
sparc: fix coding style of the area to be moved
Blue Swirl
1
-14
/
+17
2011-06-26
cpu_loop_exit: avoid using AREG0
Blue Swirl
1
-3
/
+3
2011-06-26
Sparc32: dummy implementation of MXCC MMU breakpoint registers
Blue Swirl
3
-3
/
+53
2011-06-08
Fix compilation warning due to missing header for sigaction (followup)
Alexandre Raymond
1
-1
/
+0
2011-05-22
Delete unused tb_invalidate_page_range
Blue Swirl
3
-8
/
+1
2011-05-14
sparc64: fix incorrect BPcc target sign extension
Blue Swirl
1
-1
/
+1
2011-05-14
sparc64: fix wrpstate and wrtl on delay slot
Blue Swirl
1
-8
/
+20
2011-04-20
Remove unused function parameter from cpu_restore_state
Stefan Weil
1
-1
/
+1
2011-04-20
Remove unused function parameters from gen_pc_load and rename the function
Stefan Weil
1
-2
/
+1
2011-04-10
Fix conversions from pointer to tcg_target_long
Stefan Weil
1
-1
/
+1
2011-03-13
inline cpu_halted into sole caller
Paolo Bonzini
1
-10
/
+0
2011-02-01
SPARC: Fix Leon3 cache control
Fabien Chouteau
3
-7
/
+21
2011-01-24
SPARC: Add asr17 register support
Fabien Chouteau
3
-1
/
+14
2011-01-24
SPARC: Emulation of Leon3
Fabien Chouteau
5
-21
/
+193
2011-01-18
sparc: fix NaN handling
Blue Swirl
1
-22
/
+34
2010-12-28
target-sparc: fix udiv(cc) and sdiv(cc)
Aurelien Jarno
3
-18
/
+50
2010-12-19
Sparc: implement monitor command 'info tlb'
Blue Swirl
3
-55
/
+55
2010-12-04
target-sparc: Use fprintf_function (format checking)
Stefan Weil
1
-2
/
+2
2010-12-03
target-sparc: remove unused functions cpu_lock(), cpu_unlock()
Peter Maydell
2
-16
/
+0
2010-10-30
target-xxx: Use fprintf_function (format checking)
Stefan Weil
1
-7
/
+4
2010-07-03
remove exec-all.h inclusion from cpu.h
Paolo Bonzini
1
-1
/
+0
2010-07-03
move cpu_pc_from_tb to target-*/exec.h
Paolo Bonzini
2
-6
/
+6
2010-06-02
sparc64: fix umul and smul insns
Igor V. Kovalenko
1
-26
/
+29
2010-06-02
sparc64: fix udiv and sdiv insns
Igor V. Kovalenko
1
-2
/
+2
2010-06-02
sparc64: improve ldf and stf insns
Igor V. Kovalenko
1
-0
/
+28
2010-06-02
sparc64: use symbolic name for MMU index v1
Igor V. Kovalenko
1
-12
/
+16
2010-06-02
sparc64: fix ldxfsr insn
Igor V. Kovalenko
1
-1
/
+5
2010-06-02
sparc64: fix missing address masking v1
Igor V. Kovalenko
2
-2
/
+52
2010-06-02
sparc64: fix tag access register on mmu traps
Igor V. Kovalenko
1
-0
/
+5
2010-05-29
sparc32 SuperSPARC MMU Breakpoint Action register (SS-20 OBP fix)
Artyom Tarasenko
1
-0
/
+1
2010-05-29
sparc64: fix user emulator build
Blue Swirl
1
-0
/
+2
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