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AgeCommit message (Expand)AuthorFilesLines
2008-03-06 Convert exception ops to TCGblueswir15-18/+19
2008-03-06 Fix microSPARC II SFSR mask (Robert Reif)blueswir11-1/+1
2008-03-05 Convert Sparc64 trap state ops to TCGblueswir14-69/+102
2008-03-04 Convert float helpers to TCG, fix fabsq in the processblueswir15-281/+232
2008-03-04 Convert fmovr to TCGblueswir11-15/+27
2008-03-02 Convert tick operations to TCGblueswir15-58/+90
2008-03-02 Convert movr and (partially) movcc to TCGblueswir12-24/+42
2008-03-02 Convert addx, subx, next_insn and mov_pc_npc to TCGblueswir12-27/+29
2008-02-27 Temporary fix for i386 hostblueswir12-0/+27
2008-02-24 Modify Sparc32/64 to use TCGblueswir17-1551/+878
2008-02-14 Fix remote debugger memory access problems reported by Matthias Steinblueswir12-7/+12
2008-02-11 Sparc32 MMU register fixes (Robert Reif)blueswir14-9/+103
2008-02-01use the TCG code generatorbellard2-66/+12
2008-01-01 More ASIsblueswir11-6/+18
2007-12-30 Nicer debug output for exceptionsblueswir11-4/+104
2007-12-28 Initial support for Sun4d machines (SS-1000, SS-2000)blueswir11-3/+1
2007-12-28 Improved ASI debugging (Robert Reif)blueswir11-14/+58
2007-12-25 Enforce context table alignmentblueswir11-1/+1
2007-12-11 Partial fix to Sparc32 Linux host global register mangling problemblueswir11-0/+2
2007-12-10 Add ASIs (Robert Reif)blueswir11-1/+8
2007-12-09Handle cpu_model in copy_cpu(), by Kirill A. Shutemov.ths1-0/+1
2007-11-29 Increase prom size for boot modeblueswir11-1/+1
2007-11-28Use slavio base as boot prom address, rearrange sun4m init codeblueswir12-1/+2
2007-11-28 Fix compilation and warnings on PPC hostblueswir12-1/+21
2007-11-25 Fix floating point register decodingblueswir11-141/+139
2007-11-25 128-bit float support for user modeblueswir17-15/+599
2007-11-25 More MMU registers (Robert Reif)blueswir12-7/+18
2007-11-19 Fix MXCC register 64 bit read word order (Robert Reif)blueswir11-4/+4
2007-11-17Break up vl.h.pbrook2-24/+31
2007-11-17 Remove unnecessary register masking (Robert Reif)blueswir11-5/+5
2007-11-17 Fix MXCC error register (Robert Reif)blueswir11-4/+2
2007-11-17 Add MXCC module reset register (Robert Reif)blueswir11-0/+8
2007-11-11removed warningbellard1-1/+1
2007-11-10added cpu_model parameter to cpu_init()bellard2-30/+32
2007-11-10 More Sparc64 CPU definitionsblueswir11-1/+99
2007-11-09 More CPU definitionsblueswir11-4/+102
2007-11-07 CPU specific boot mode (Robert Reif)blueswir14-6/+13
2007-10-29Adjust s390 addresses (the MSB is defined as "to be ignored").ths1-1/+5
2007-10-28 Use shared ctpop64 helperblueswir11-6/+2
2007-10-20 Avoid gcc warningsblueswir11-2/+2
2007-10-20 Fix compiling Sparc64 on PPC hostblueswir12-0/+18
2007-10-17 Use ldq and stq for 8 byte accesses (original patch by Robert Reif)blueswir12-25/+30
2007-10-17 Enable all alignment checksblueswir11-48/+5
2007-10-14 Fix bug in Sparc32 sta op (Robert Reif)blueswir11-1/+1
2007-10-14 Sparc64 hypervisor modeblueswir14-48/+121
2007-10-14 SuperSparc MXCC support (Robert Reif)blueswir13-18/+157
2007-10-14 Support for 32 bit ABI on 64 bit targets (only enabled Sparc64)blueswir11-17/+23
2007-10-14Replace is_user variable with mmu_idx in softmmu core,j_mayer5-15/+29
2007-10-12Unify '-cpu ?' option.j_mayer1-0/+1
2007-10-10 Fix taddcctv and tsubcctv (David Matthews)blueswir12-1/+3
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