| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2008-05-12 | Wrap long lines | blueswir1 | 1 | -44/+84 |
| 2008-05-11 | Remove someexplicit alignment checks (initial patch by Fabrice Bellard) | blueswir1 | 1 | -54/+80 |
| 2008-05-10 | suppressed fixed registers | bellard | 1 | -28/+1 |
| 2008-05-10 | Fix compiler warnings | blueswir1 | 1 | -3/+3 |
| 2008-05-09 | CPU feature selection support | blueswir1 | 1 | -47/+56 |
| 2008-05-09 | Move #include to speed up compilation | blueswir1 | 1 | -0/+3 |
| 2008-05-04 | Complete the TCG conversion | blueswir1 | 1 | -0/+103 |
| 2008-04-22 | Revert the previous patch | blueswir1 | 1 | -0/+108 |
| 2008-04-22 | Move 128-bit float emulation under linux-user | blueswir1 | 1 | -108/+0 |
| 2008-03-21 | Convert align checks to TCG | blueswir1 | 1 | -0/+6 |
| 2008-03-21 | Convert save, restore, saved, restored, and flushw to TCG | blueswir1 | 1 | -0/+92 |
| 2008-03-21 | Convert other float and VIS ops to TCG | blueswir1 | 1 | -34/+614 |
| 2008-03-18 | Convert udiv and sdiv ops to TCG | blueswir1 | 1 | -0/+44 |
| 2008-03-18 | Convert CCR and CWP ops to TCG | blueswir1 | 1 | -0/+21 |
| 2008-03-18 | Convert array8/16/32 and alignaddr to TCG | blueswir1 | 1 | -0/+31 |
| 2008-03-15 | Convert ldfsr and stfsr to TCG | blueswir1 | 1 | -1/+8 |
| 2008-03-05 | Convert Sparc64 trap state ops to TCG | blueswir1 | 1 | -17/+21 |
| 2008-03-04 | Convert float helpers to TCG, fix fabsq in the process | blueswir1 | 1 | -22/+13 |
| 2008-02-24 | Modify Sparc32/64 to use TCG | blueswir1 | 1 | -280/+318 |
| 2008-02-11 | Sparc32 MMU register fixes (Robert Reif) | blueswir1 | 1 | -8/+14 |
| 2008-01-01 | More ASIs | blueswir1 | 1 | -6/+18 |
| 2007-12-30 | Nicer debug output for exceptions | blueswir1 | 1 | -4/+104 |
| 2007-12-28 | Initial support for Sun4d machines (SS-1000, SS-2000) | blueswir1 | 1 | -3/+1 |
| 2007-12-28 | Improved ASI debugging (Robert Reif) | blueswir1 | 1 | -14/+58 |
| 2007-12-10 | Add ASIs (Robert Reif) | blueswir1 | 1 | -1/+8 |
| 2007-11-28 | Fix compilation and warnings on PPC host | blueswir1 | 1 | -0/+17 |
| 2007-11-25 | 128-bit float support for user mode | blueswir1 | 1 | -0/+39 |
| 2007-11-25 | More MMU registers (Robert Reif) | blueswir1 | 1 | -6/+17 |
| 2007-11-19 | Fix MXCC register 64 bit read word order (Robert Reif) | blueswir1 | 1 | -4/+4 |
| 2007-11-17 | Break up vl.h. | pbrook | 1 | -24/+0 |
| 2007-11-17 | Remove unnecessary register masking (Robert Reif) | blueswir1 | 1 | -5/+5 |
| 2007-11-17 | Fix MXCC error register (Robert Reif) | blueswir1 | 1 | -4/+2 |
| 2007-11-17 | Add MXCC module reset register (Robert Reif) | blueswir1 | 1 | -0/+8 |
| 2007-11-11 | removed warning | bellard | 1 | -1/+1 |
| 2007-11-07 | CPU specific boot mode (Robert Reif) | blueswir1 | 1 | -2/+2 |
| 2007-10-29 | Adjust s390 addresses (the MSB is defined as "to be ignored"). | ths | 1 | -1/+5 |
| 2007-10-28 | Use shared ctpop64 helper | blueswir1 | 1 | -6/+2 |
| 2007-10-20 | Avoid gcc warnings | blueswir1 | 1 | -2/+2 |
| 2007-10-20 | Fix compiling Sparc64 on PPC host | blueswir1 | 1 | -0/+15 |
| 2007-10-17 | Use ldq and stq for 8 byte accesses (original patch by Robert Reif) | blueswir1 | 1 | -21/+22 |
| 2007-10-14 | Fix bug in Sparc32 sta op (Robert Reif) | blueswir1 | 1 | -1/+1 |
| 2007-10-14 | Sparc64 hypervisor mode | blueswir1 | 1 | -30/+68 |
| 2007-10-14 | SuperSparc MXCC support (Robert Reif) | blueswir1 | 1 | -16/+151 |
| 2007-10-14 | Replace is_user variable with mmu_idx in softmmu core, | j_mayer | 1 | -2/+2 |
| 2007-10-01 | Fix block load ASIs | blueswir1 | 1 | -9/+25 |
| 2007-09-30 | Fix Sparc64 ldfa, lddfa, stfa, and stdfa instructions | blueswir1 | 1 | -0/+73 |
| 2007-09-24 | CPU boot mode | blueswir1 | 1 | -2/+2 |
| 2007-09-23 | Add missing break statements | blueswir1 | 1 | -0/+20 |
| 2007-09-21 | Rework ASI instructions (Aurelien Jarno) | blueswir1 | 1 | -27/+376 |
| 2007-09-20 | Detabify | blueswir1 | 1 | -308/+308 |
