aboutsummaryrefslogtreecommitdiff
path: root/target-sparc/op_helper.c
AgeCommit message (Expand)AuthorFilesLines
2009-05-13Replace gcc variadic macro extension with C99 versionBlue Swirl1-8/+8
2009-05-10Convert udiv/sdivBlue Swirl1-0/+25
2009-05-10Convert tagged opsBlue Swirl1-0/+77
2009-05-10Convert subxBlue Swirl1-0/+44
2009-05-10Convert subBlue Swirl1-0/+72
2009-05-10Convert logical operations and umul/smulBlue Swirl1-0/+19
2009-05-10Convert addxBlue Swirl1-0/+44
2009-05-10Convert addBlue Swirl1-0/+93
2009-05-10Use dynamical computation for condition codesBlue Swirl1-0/+61
2009-04-25Fix a warning in sparc64-linux-user buildBlue Swirl1-1/+1
2009-04-25sparc64 support TSB related MMU registersIgor Kovalenko1-6/+93
2009-03-16Delete some unused macros detected with -Wp,-Wunused-macros useblueswir11-2/+0
2009-01-15global s/loglevel & X/qemu_loglevel_mask(X)/ (Eduardo Habkost)aliguori1-2/+2
2009-01-15Convert references to logfile/loglevel to use qemu_log*() macrosaliguori1-10/+10
2008-12-23Add SuperSPARC MMU breakpoint registers (Robert Reif)blueswir11-1/+44
2008-12-11Add missing "static"blueswir11-1/+1
2008-11-17TCG variable type checking.pbrook1-0/+5
2008-10-07Fix error in fexpand (spotted by sparse)blueswir11-4/+4
2008-10-06Show size for unassigned accesses (Robert Reif)blueswir11-13/+14
2008-10-03Rearrange tick functionsblueswir11-0/+24
2008-10-02Fix MXCC printf warning (based on patch by Robert Reif)blueswir11-3/+3
2008-09-27Add mmu tlb demap support (Igor Kovalenko)blueswir11-1/+35
2008-09-26Implement some UA2007 block ASIsblueswir11-0/+6
2008-09-26Implement UA2005 hypervisor trapsblueswir11-14/+0
2008-09-26Move also DEBUG_PCALL (see r5085)blueswir11-0/+1
2008-09-22Add software and timer interrupt supportblueswir11-0/+15
2008-09-22Fix arguments used in cas/casx, thanks to Igor Kovalenko for spottingblueswir11-5/+5
2008-09-21Use the new concat_i32_i64 op for std and stdablueswir11-5/+0
2008-09-14Fix array subscript above array bounds errorblueswir11-1/+1
2008-09-10Convert rest of ops using float32 to TCG, remove FT0 and FT1blueswir11-15/+15
2008-09-10Partially convert float128 conversion ops to TCGblueswir11-8/+8
2008-09-10Convert basic 64 bit VIS ops to TCGblueswir11-45/+0
2008-09-10Convert basic 32 bit VIS ops to TCGblueswir11-73/+8
2008-09-10Convert basic float32 ops to TCGblueswir11-22/+53
2008-09-09Implement ldxfsr/stxfsr, fix ld(x)fsr masks, convert to TCGblueswir11-4/+12
2008-09-03Implement no-fault loadsblueswir11-8/+36
2008-08-29Fix Sparc64 boot on i386 host:blueswir11-16/+233
2008-08-25Fix udiv and sdiv on Sparc64 (Vince Weaver)blueswir11-2/+2
2008-08-21Use initial CPU definition structure for some CPU fields instead of copyingblueswir11-12/+17
2008-08-06Fix faligndata (Vince Weaver)blueswir11-1/+4
2008-08-06Fix I/D MMU tag readsblueswir11-54/+4
2008-07-25Make MAXTL dynamic, bounds check tl when indexingblueswir11-2/+2
2008-07-20Make UA200x features selectable, add MMU typesblueswir11-6/+10
2008-07-19Remove unused variableblueswir11-2/+0
2008-07-19Implement nucleus quad lddablueswir11-4/+57
2008-07-17Fix saving and loading of trap stateblueswir11-4/+4
2008-07-17Support for address maskingblueswir11-9/+19
2008-07-16Fix MMU registers, add more E-cache ASIsblueswir11-10/+64
2008-07-08Implement some Ultrasparc cache ASIs used by SILOblueswir11-0/+20
2008-06-20Fix boot problem on i386 host introduced in r4690blueswir11-4/+4
generated by cgit v1.1 at 2024-12-28 19:38:40 +0000