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AgeCommit message (Expand)AuthorFilesLines
2013-02-16target-sh4: Move TCG initialization to SuperHCPU initfnAndreas Färber3-2/+6
2013-02-16target-sh4: Introduce QOM realizefn for SuperHCPUAndreas Färber3-2/+19
2013-02-01target-sh4: Mark as unmigratableAndreas Färber3-1/+9
2013-01-15cpu: Move cpu_index field to CPUStateAndreas Färber1-1/+1
2012-12-19fpu: move public header file to include/fpuPaolo Bonzini1-3/+1
2012-12-19qom: move include files to include/qom/Paolo Bonzini1-1/+1
2012-12-19exec: move include files to include/exec/Paolo Bonzini4-11/+11
2012-12-19build: kill libdis, move disassemblers to disas/Paolo Bonzini1-1/+1
2012-12-16exec: refactor cpu_restore_stateBlue Swirl1-17/+6
2012-12-08TCG: Use gen_opc_instr_start from context instead of global variable.Evgeny Voevodin1-3/+3
2012-12-08TCG: Use gen_opc_icount from context instead of global variable.Evgeny Voevodin1-1/+1
2012-12-08TCG: Use gen_opc_pc from context instead of global variable.Evgeny Voevodin1-2/+2
2012-11-17TCG: Use gen_opc_buf from context instead of global variable.Evgeny Voevodin1-3/+3
2012-11-17TCG: Use gen_opc_ptr from context instead of global variable.Evgeny Voevodin1-4/+4
2012-11-10disas: avoid using cpu_single_envBlue Swirl1-1/+1
2012-10-31cpus: Pass CPUState to [qemu_]cpu_has_work()Andreas Färber1-1/+3
2012-10-28target-sh4: rename helper flagsAurelien Jarno1-3/+3
2012-10-23Rename target_phys_addr_t to hwaddrAvi Kivity2-17/+17
2012-09-27Emit debug_insn for CPU_LOG_TB_OP_OPT as well.Richard Henderson1-1/+1
2012-09-21target-sh4: remove useless codeAurelien Jarno1-4/+0
2012-09-21target-sh4: cleanup DisasContextAurelien Jarno1-30/+26
2012-09-21target-sh4: rework exceptions handlingAurelien Jarno3-30/+32
2012-09-21target-sh4: remove gen_clr_t() and gen_set_t()Aurelien Jarno1-13/+3
2012-09-21target-sh4: optimize swap.wAurelien Jarno1-11/+1
2012-09-21target-sh4: optimize xtrctAurelien Jarno1-1/+0
2012-09-21target-sh4: implement addv and subv using TCGAurelien Jarno3-62/+34
2012-09-21target-sh4: implement addc and subc using TCGAurelien Jarno3-36/+36
2012-09-21target-sh4: use float32_muladd() to implement fmacAurelien Jarno1-2/+1
2012-09-21target-sh4: mark a few helpers const and pureAurelien Jarno1-3/+3
2012-09-15target-sh4: switch to AREG0 free modeBlue Swirl4-188/+194
2012-06-07build: move other target-*/ objects to nested Makefile.objsPaolo Bonzini1-1/+2
2012-06-07build: move libobj-y variable to nested Makefile.objsPaolo Bonzini1-1/+3
2012-06-07build: move obj-TARGET-y variables to nested Makefile.objsPaolo Bonzini1-0/+1
2012-06-04Kill off cpu_state_reset()Andreas Färber1-5/+0
2012-06-04target-sh4: Let cpu_sh4_init() return SuperHCPUAndreas Färber2-4/+12
2012-04-30target-sh4: Start QOM'ifying CPU initAndreas Färber2-2/+11
2012-04-30target-sh4: QOM'ify CPU resetAndreas Färber2-21/+22
2012-04-30target-sh4: QOM'ify CPUAndreas Färber4-1/+135
2012-04-14Use uintptr_t for various op related functionsBlue Swirl1-8/+6
2012-03-14Rename CPUState -> CPUArchStateAndreas Färber1-1/+1
2012-03-14target-sh4: Don't overuse CPUStateAndreas Färber4-44/+44
2012-03-14Rename cpu_reset() to cpu_state_reset()Andreas Färber1-2/+2
2012-02-28target-sh4: Clean includesStefan Weil1-6/+0
2012-01-10target-sh4: ignore ocbp and ocbwb instructionsAurelien Jarno1-11/+3
2012-01-07target-sh4: Fix operands for fipr, ftrv instructionsStefan Weil1-3/+3
2011-12-05Merge remote-tracking branch 'stefanha/trivial-patches' into stagingAnthony Liguori1-1/+1
2011-12-02fix spelling in target sub directoryDong Xu Wang1-1/+1
2011-11-24sh_intc: convert interrupt controller to memory APIBenoît Canet1-0/+3
2011-10-01softmmu_header: pass CPUState to tlb_fillBlue Swirl1-4/+3
2011-08-20Use glib memory allocation and free functionsAnthony Liguori1-1/+1