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target-sh4
Age
Commit message (
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Author
Files
Lines
2009-01-04
Update FSF address in GPL/LGPL boilerplate
aurel32
5
-5
/
+5
2009-01-01
tcg_temp_local_new should take no parameter
aurel32
1
-6
/
+6
2008-12-22
Use the ARRAY_SIZE() macro where appropriate.
malc
1
-2
/
+2
2008-12-13
target-sh4: make the initial value of SR easier to read
aurel32
2
-1
/
+5
2008-12-13
target-sh4: don't disable FPU instructions in user mode
aurel32
1
-1
/
+1
2008-12-13
target-sh4: disable debug code
aurel32
1
-1
/
+3
2008-12-13
target-sh4: add prefi, icbi, synco
aurel32
2
-0
/
+27
2008-12-13
target-sh4: add SH7785 as CPU option
aurel32
2
-1
/
+8
2008-12-11
target-sh4: remove 2 warnings
aurel32
2
-4
/
+4
2008-12-10
target-sh4: Add SH bit handling to TLB
aurel32
1
-6
/
+6
2008-12-10
target-sh4: check FD bit for FP instructions
aurel32
1
-6
/
+23
2008-12-07
SH4: kill a few warnings
aurel32
1
-2
/
+2
2008-12-07
SH4: Implement FD bit
aurel32
4
-5
/
+42
2008-12-07
SH4: Eliminate P4 to A7 mangling (Takashi YOSHII).
balrog
1
-12
/
+0
2008-12-07
SH: On-chip PCI controller support (Takashi YOSHII).
balrog
1
-0
/
+3
2008-12-07
Remove FORCE_RET() and RETURN()
aurel32
1
-2
/
+0
2008-11-30
Common cpu_loop_exit prototype
aurel32
1
-2
/
+0
2008-11-25
Use sys-queue.h for break/watchpoint managment (Jan Kiszka)
aliguori
1
-2
/
+2
2008-11-22
target-sh4: fix 64-bit fmov to/from memory
aurel32
1
-29
/
+33
2008-11-21
target-sh4: fix TLB/MMU emulation
aurel32
1
-36
/
+29
2008-11-20
target-sh4: fix fldi0/fldi1
aurel32
1
-4
/
+2
2008-11-19
target-sh4: map FP registers as TCG variables
aurel32
1
-106
/
+43
2008-11-19
target-sh4: use CPU_Float/CPU_Double instead of ugly casts
aurel32
1
-40
/
+102
2008-11-18
Refactor and enhance break/watchpoint API (Jan Kiszka)
aliguori
1
-3
/
+4
2008-11-18
Refactor translation block CPU state handling (Jan Kiszka)
aliguori
1
-0
/
+11
2008-11-18
Convert CPU_PC_FROM_TB to static inline (Jan Kiszka)
aliguori
1
-5
/
+7
2008-11-17
TCG variable type checking.
pbrook
3
-308
/
+313
2008-10-26
Fix undeclared symbol warnings from sparse
blueswir1
1
-2
/
+2
2008-10-12
SH4: Implement MOVUA.L
aurel32
1
-0
/
+11
2008-10-12
SH4: fix single-stepping
aurel32
1
-0
/
+1
2008-10-12
SH4: Fix swap.b
aurel32
1
-1
/
+4
2008-10-05
Silence some warnings about no value returned from non-void function
blueswir1
1
-1
/
+1
2008-09-21
Add concat_i32_i64 op.
pbrook
1
-6
/
+3
2008-09-20
Suppress gcc 4.x -Wpointer-sign (included in -Wall) warnings
blueswir1
1
-2
/
+2
2008-09-15
SH4: Privilege check for instructions
aurel32
1
-24
/
+43
2008-09-15
qemu sh4 nptl support
aurel32
1
-0
/
+5
2008-09-15
sh4: doesn't set the cpu_model_str
aurel32
1
-0
/
+1
2008-09-15
SH4: sleep instruction bug fix
aurel32
3
-3
/
+4
2008-09-02
sh4: CPU versioning.
aurel32
2
-0
/
+76
2008-09-02
SH4: fix a regression introduced in r5122
aurel32
1
-1
/
+1
2008-09-01
SH4: Remove dyngen leftovers
aurel32
3
-16
/
+1
2008-09-01
SH4: final conversion to TCG
aurel32
4
-28
/
+14
2008-09-01
SH4: convert floating-point ops to TCG
aurel32
5
-420
/
+421
2008-09-01
SH4: Remove most uses of cpu_T[0] and cpu_T[1]
aurel32
1
-181
/
+427
2008-09-01
SH4: TCG optimisations
aurel32
1
-349
/
+236
2008-09-01
SH4: Convert remaining non-fp ops to TCG
aurel32
5
-153
/
+130
2008-08-30
SH4: Convert shift functions to TCG
aurel32
2
-24
/
+9
2008-08-30
SH4: convert control/status register load/store to TCG
aurel32
4
-82
/
+69
2008-08-30
SH4: Convert memory loads/stores to TCG
aurel32
2
-126
/
+58
2008-08-30
SH4: convert some more arithmetics ops to TCG
aurel32
5
-193
/
+86
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