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target-sh4
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translate.c
Age
Commit message (
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Author
Files
Lines
2009-09-12
Fix sys-queue.h conflict for good
Blue Swirl
1
-2
/
+2
2009-07-16
Update to a hopefully more future proof FSF address
Blue Swirl
1
-2
/
+1
2009-05-13
Include assert.h from qemu-common.h
Paul Brook
1
-1
/
+0
2009-04-24
qemu: introduce qemu_init_vcpu (Marcelo Tosatti)
aliguori
1
-0
/
+1
2009-04-05
Add new command line option -singlestep for tcg single stepping.
aurel32
1
-3
/
+2
2009-04-01
SH: Improve movca.l/ocbi emulation.
edgar_igl
1
-4
/
+42
2009-03-02
SH: Implement MOVCO.L and MOVLI.L
aurel32
1
-1
/
+34
2009-02-07
SH7750/51: add register BCR3, BCR4, PCR, RTCOR, RTCNT, RTCSR, SDMR2, SDMR3 an...
aurel32
1
-0
/
+2
2009-02-05
targets: remove error handling from qemu_malloc() callers (Avi Kivity)
aliguori
1
-2
/
+0
2009-01-26
Log reset events (Jan Kiszka)
aliguori
1
-0
/
+5
2009-01-15
global s/loglevel & X/qemu_loglevel_mask(X)/ (Eduardo Habkost)
aliguori
1
-1
/
+1
2009-01-15
Convert references to logfile/loglevel to use qemu_log*() macros
aliguori
1
-10
/
+7
2009-01-14
sh4: Add FMAC instruction support
aurel32
1
-0
/
+11
2009-01-04
Update FSF address in GPL/LGPL boilerplate
aurel32
1
-1
/
+1
2009-01-01
tcg_temp_local_new should take no parameter
aurel32
1
-6
/
+6
2008-12-22
Use the ARRAY_SIZE() macro where appropriate.
malc
1
-2
/
+2
2008-12-13
target-sh4: make the initial value of SR easier to read
aurel32
1
-1
/
+1
2008-12-13
target-sh4: don't disable FPU instructions in user mode
aurel32
1
-1
/
+1
2008-12-13
target-sh4: disable debug code
aurel32
1
-1
/
+3
2008-12-13
target-sh4: add prefi, icbi, synco
aurel32
1
-0
/
+20
2008-12-13
target-sh4: add SH7785 as CPU option
aurel32
1
-1
/
+7
2008-12-10
target-sh4: check FD bit for FP instructions
aurel32
1
-6
/
+23
2008-12-07
SH4: kill a few warnings
aurel32
1
-2
/
+2
2008-12-07
SH4: Implement FD bit
aurel32
1
-4
/
+26
2008-11-25
Use sys-queue.h for break/watchpoint managment (Jan Kiszka)
aliguori
1
-2
/
+2
2008-11-22
target-sh4: fix 64-bit fmov to/from memory
aurel32
1
-29
/
+33
2008-11-20
target-sh4: fix fldi0/fldi1
aurel32
1
-4
/
+2
2008-11-19
target-sh4: map FP registers as TCG variables
aurel32
1
-106
/
+43
2008-11-18
Refactor and enhance break/watchpoint API (Jan Kiszka)
aliguori
1
-3
/
+4
2008-11-17
TCG variable type checking.
pbrook
1
-267
/
+271
2008-10-26
Fix undeclared symbol warnings from sparse
blueswir1
1
-2
/
+2
2008-10-12
SH4: Implement MOVUA.L
aurel32
1
-0
/
+11
2008-10-12
SH4: fix single-stepping
aurel32
1
-0
/
+1
2008-10-12
SH4: Fix swap.b
aurel32
1
-1
/
+4
2008-10-05
Silence some warnings about no value returned from non-void function
blueswir1
1
-1
/
+1
2008-09-21
Add concat_i32_i64 op.
pbrook
1
-6
/
+3
2008-09-20
Suppress gcc 4.x -Wpointer-sign (included in -Wall) warnings
blueswir1
1
-2
/
+2
2008-09-15
SH4: Privilege check for instructions
aurel32
1
-24
/
+43
2008-09-15
sh4: doesn't set the cpu_model_str
aurel32
1
-0
/
+1
2008-09-15
SH4: sleep instruction bug fix
aurel32
1
-1
/
+1
2008-09-02
sh4: CPU versioning.
aurel32
1
-0
/
+59
2008-09-02
SH4: fix a regression introduced in r5122
aurel32
1
-1
/
+1
2008-09-01
SH4: Remove dyngen leftovers
aurel32
1
-5
/
+0
2008-09-01
SH4: final conversion to TCG
aurel32
1
-1
/
+7
2008-09-01
SH4: convert floating-point ops to TCG
aurel32
1
-153
/
+249
2008-09-01
SH4: Remove most uses of cpu_T[0] and cpu_T[1]
aurel32
1
-181
/
+427
2008-09-01
SH4: TCG optimisations
aurel32
1
-349
/
+236
2008-09-01
SH4: Convert remaining non-fp ops to TCG
aurel32
1
-28
/
+109
2008-08-30
SH4: Convert shift functions to TCG
aurel32
1
-3
/
+9
2008-08-30
SH4: convert control/status register load/store to TCG
aurel32
1
-36
/
+58
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