aboutsummaryrefslogtreecommitdiff
path: root/target-s390x/ioinst.c
AgeCommit message (Collapse)AuthorFilesLines
2015-06-17s390/ioinst: fix endianness in ioinst_schib_validAlexander Graf1-3/+3
The ioinst_schib_valid gets a SCHIB in guest endianness, we should byteswap the fields we access. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-04-30s390x/kvm: Support access register mode for KVM_S390_MEM_OP ioctlAlexander Yarygin1-17/+25
Access register mode is one of the modes that control dynamic address translation. In this mode the address space is specified by values of the access registers. The effective address-space-control element is obtained from the result of the access register translation. See the "Access-Register Introduction" section of the chapter 5 "Program Execution" in "Principles of Operations" for more details. When the CPU is in AR mode, the s390_cpu_virt_mem_rw() function must know which access register number to use for address translation. This patch does several things: - add new parameter 'uint8_t ar' to that function - decode ar number from intercepted instructions - pass the ar number to s390_cpu_virt_mem_rw(), which in turn passes it to the KVM_S390_MEM_OP ioctl. Signed-off-by: Alexander Yarygin <yarygin@linux.vnet.ibm.com> Reviewed-by: Thomas Huth <thuth@linux.vnet.ibm.com> Reviewed-by: David Hildenbrand <dahi@linux.vnet.ibm.com> Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2015-02-18s390x/ioinst: Rework memory access in TPI instructionThomas Huth1-12/+7
Change the handler for TPI to use the new logical memory access functions. Signed-off-by: Thomas Huth <thuth@linux.vnet.ibm.com> Signed-off-by: Jens Freimann <jfrei@linux.vnet.ibm.com> Acked-by: Cornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2015-02-18s390x/ioinst: Rework memory access in CHSC instructionThomas Huth1-9/+13
Change the CHSC handler to correctly use logical addresses, too. Signed-off-by: Thomas Huth <thuth@linux.vnet.ibm.com> Signed-off-by: Jens Freimann <jfrei@linux.vnet.ibm.com> Reviewed-by: David Hildenbrand <dahi@linux.vnet.ibm.com> Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2015-02-18s390x/ioinst: Rework memory access in STCRW instructionThomas Huth1-11/+9
Change the handler for STCRW to use the new logical memory access functions. Since STCRW is suppressed on protection/access exceptions, we also have to make sure to re-queue the CRW in case it could not be written to the memory. Signed-off-by: Thomas Huth <thuth@linux.vnet.ibm.com> Signed-off-by: Jens Freimann <jfrei@linux.vnet.ibm.com> Reviewed-by: David Hildenbrand <dahi@linux.vnet.ibm.com> Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2015-02-18s390x/ioinst: Rework memory access in TSCH instructionThomas Huth1-14/+19
Change the TSCH handler to use the new logical memory access functions. Since the channel should not be updated in case of a protection or access exception while writing to the guest memory, the css_do_tsch() has to be split up into two parts, one for retrieving the IRB and one for the update. Signed-off-by: Thomas Huth <thuth@linux.vnet.ibm.com> Signed-off-by: Jens Freimann <jfrei@linux.vnet.ibm.com> Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2015-02-18s390x/ioinst: Set condition code in ioinst_handle_tsch() handlerThomas Huth1-4/+4
Move the setting of the condition code from kvm.c into the handler function in ioinst.c itself, just like it has been done with the other handlers already (TSCH has just not been changed yet since it is called from a different dispatcher in kvm.c). Signed-off-by: Thomas Huth <thuth@linux.vnet.ibm.com> Signed-off-by: Jens Freimann <jfrei@linux.vnet.ibm.com> Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com> Reviewed-by: David Hildenbrand <dahi@linux.vnet.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2015-02-18s390x/ioinst: Rework memory access in STSCH instructionThomas Huth1-14/+22
Change the handler for STSCH to use the new logical memory access functions. Signed-off-by: Thomas Huth <thuth@linux.vnet.ibm.com> Signed-off-by: Jens Freimann <jfrei@linux.vnet.ibm.com> Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2015-02-18s390x/ioinst: Rework memory access in SSCH instructionThomas Huth1-11/+5
Change the handler for SSCH to use the new logical memory access functions. Signed-off-by: Thomas Huth <thuth@linux.vnet.ibm.com> Signed-off-by: Jens Freimann <jfrei@linux.vnet.ibm.com> Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2015-02-18s390x/ioinst: Rework memory access in MSCH instructionThomas Huth1-13/+7
Change the handler for MSCH to use the new logical memory access functions. Signed-off-by: Thomas Huth <thuth@linux.vnet.ibm.com> Signed-off-by: Jens Freimann <jfrei@linux.vnet.ibm.com> Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2015-01-12s390: Add PCI bus supportFrank Blaschka1-0/+52
This patch implements a pci bus for s390x together with infrastructure to generate and handle hotplug events, to configure/unconfigure via sclp instruction, to do iommu translations and provide s390 support for MSI/MSI-X notification processing. Signed-off-by: Frank Blaschka <frank.blaschka@de.ibm.com> Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2013-12-18s390x/ioinst: CHSC has to set a condition codeThomas Huth1-0/+1
I missed to set the CC in the CHSC instruction when I refactored the CC setting in the IO instructions with the following commit: 5d9bf1c07c1369ab3506fc82cc65a10f4415d867 s390/ioinst: Moved the CC setting to the IO instruction handlers This patch now restores the correct behaviour of CHSC by setting the condition code 0 at the end of the instruction. Signed-off-by: Thomas Huth <thuth@linux.vnet.ibm.com> Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: Jens Freimann <jfrei@linux.vnet.ibm.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-09-20s390/ioinst: Moved the CC setting to the IO instruction handlersThomas Huth1-60/+50
The IO instruction handlers now take care of setting the CC value on their own, so that the confusing return code magic in kvm_handle_css_inst() is not needed anymore. Signed-off-by: Thomas Huth <thuth@linux.vnet.ibm.com> Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2013-07-30s390x/ioinst: Fixed priority of operand exceptionsThomas Huth1-17/+13
Operand exceptions have a lower priority than specification and address exceptions. Thus the checks for operand exceptions must be done later. Signed-off-by: Thomas Huth <thuth@linux.vnet.ibm.com> Acked-by: Cornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2013-07-30s390x/ioinst: Fixed alignment check in SCHM instructionThomas Huth1-1/+1
Register 2 only has to be aligned to a 32-byte boundary, not a full page boundary. Signed-off-by: Thomas Huth <thuth@linux.vnet.ibm.com> Acked-by: Cornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2013-07-30s390x/ioinst: Throw addressing exception when memory_map failedThomas Huth1-7/+7
So far, the IO instructions were throwing specification exceptions when there was a problem with accessing the memory. However, the better way is to throw an addressing exception instead. Signed-off-by: Thomas Huth <thuth@linux.vnet.ibm.com> Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2013-07-30s390x/ioinst: Add missing alignment checks for IO instructionsThomas Huth1-0/+25
The IO instructions MSCH, SSCH, STSCH, TSCH, STCRW and TPI require that the second operand address must be aligned on a word boundary. Signed-off-by: Thomas Huth <thuth@linux.vnet.ibm.com> Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2013-03-08s390/css: Fix subchannel detectionChristian Borntraeger1-1/+1
We have to consider the m bit to find the real channel subsystem when determining the last subchannel. If we fail to take this into account, removal of a subchannel in the middle of a big list of devices will stop device detection after a reboot. Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Jens Freimann <jfrei@linux.vnet.ibm.com> Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-01-29s390: Use s390_cpu_physical_memory_map for tpi.Cornelia Huck1-5/+14
Map the I/O interruption code before calling into css. Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-01-29s390: Add channel I/O instructions.Cornelia Huck1-0/+716
Provide handlers for (most) channel I/O instructions. Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-01-29s390: Channel I/O basic definitions.Cornelia Huck1-0/+36
Basic channel I/O structures and helper function. Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: Alexander Graf <agraf@suse.de>
generated by cgit v1.1 at 2024-12-25 13:23:52 +0000