| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2015-03-09 | target-ppc: Fix warnings from Sparse | Stefan Weil | 1 | -2/+3 |
| 2015-03-09 | target-ppc: Add versions to server CPU descriptions | Alexey Kardashevskiy | 2 | -7/+9 |
| 2015-03-09 | PPC: Introduce the Virtual Time Base (VTB) SPR register | Cyril Bur | 2 | -0/+11 |
| 2015-03-09 | target-ppc: force update of msr bits in cpu_post_load | Mark Cave-Ayland | 1 | -1/+7 |
| 2015-03-09 | target-ppc: move sdr1 value change detection logic to helper_store_sdr1() | Mark Cave-Ayland | 2 | -21/+21 |
| 2015-03-09 | display cpu id dump state | Tristan Gingold | 1 | -2/+3 |
| 2015-03-09 | target-ppc: Use right page size with hash table lookup | Aneesh Kumar K.V | 3 | -11/+30 |
| 2015-02-12 | tcg: Introduce tcg_op_buf_count and tcg_op_buf_full | Richard Henderson | 1 | -6/+3 |
| 2015-02-12 | tcg: Move emit of INDEX_op_end into gen_tb_end | Richard Henderson | 1 | -1/+1 |
| 2015-01-20 | exec.c: Drop TARGET_HAS_ICE define and checks | Peter Maydell | 1 | -2/+0 |
| 2015-01-12 | kvm: extend kvm_irqchip_add_msi_route to work on s390 | Frank Blaschka | 1 | -0/+6 |
| 2015-01-10 | Merge remote-tracking branch 'remotes/agraf/tags/signed-ppc-for-upstream' int... | Peter Maydell | 7 | -110/+323 |
| 2015-01-07 | target-ppc: Mark SR() and gen_sync_exception() as !CONFIG_USER_ONLY | Peter Maydell | 1 | -0/+5 |
| 2015-01-07 | target-ppc: Introduce Privileged TM Noops | Tom Musta | 1 | -0/+38 |
| 2015-01-07 | target-ppc: Introduce tcheck | Tom Musta | 1 | -0/+17 |
| 2015-01-07 | target-ppc: Introduce TM Noops | Tom Musta | 1 | -0/+38 |
| 2015-01-07 | target-ppc: Introduce tbegin | Tom Musta | 3 | -0/+36 |
| 2015-01-07 | target-ppc: Introduce TEXASRU Bit Fields | Tom Musta | 1 | -0/+20 |
| 2015-01-07 | target-ppc: Power8 Supports Transactional Memory | Tom Musta | 1 | -2/+3 |
| 2015-01-07 | target-ppc: Introduce tm_enabled Bit to CPU State | Tom Musta | 1 | -0/+8 |
| 2015-01-07 | target-ppc: Introduce Feature Flag for Transactional Memory | Tom Musta | 1 | -0/+2 |
| 2015-01-07 | target-ppc: Introduce Instruction Type for Transactional Memory | Tom Musta | 1 | -1/+3 |
| 2015-01-07 | target-ppc: explicitly save page table headers in big endian | Cédric Le Goater | 1 | -3/+17 |
| 2015-01-07 | target-ppc: Eliminate set_fprf Argument From helper_compute_fprf | Tom Musta | 3 | -38/+28 |
| 2015-01-07 | target-ppc: Eliminate set_fprf Argument From gen_compute_fprf | Tom Musta | 1 | -15/+23 |
| 2015-01-07 | target-ppc: Fully Migrate to gen_set_cr1_from_fpscr | Tom Musta | 1 | -22/+33 |
| 2015-01-07 | target-ppc: mffs. Should Set CR1 from FPSCR Bits | Tom Musta | 1 | -1/+3 |
| 2015-01-07 | target-ppc: Fix Floating Point Move Instructions That Set CR1 | Tom Musta | 1 | -20/+30 |
| 2015-01-07 | target-ppc: VXSQRT Should Not Be Set for NaNs | Tom Musta | 1 | -12/+17 |
| 2015-01-07 | target-ppc: Load/Store Vector Element Storage Alignment | Tom Musta | 1 | -8/+14 |
| 2015-01-03 | gen-icount: check cflags instead of use_icount global | Paolo Bonzini | 1 | -1/+1 |
| 2015-01-03 | translate: check cflags instead of use_icount global | Paolo Bonzini | 1 | -12/+12 |
| 2014-12-23 | target-ppc: pass DisasContext to SPR generator functions | Paolo Bonzini | 3 | -137/+133 |
| 2014-12-16 | qemu-log: add log category for MMU info | Antony Pavlov | 3 | -29/+33 |
| 2014-11-20 | target-ppc: Altivec's mtvscr Decodes Wrong Register | Tom Musta | 1 | -1/+1 |
| 2014-11-20 | target-ppc: Fix breakpoint registers for e300 | Fabien Chouteau | 1 | -26/+26 |
| 2014-11-04 | target-ppc: Fix Altivec Round Opcodes | Tom Musta | 1 | -6/+6 |
| 2014-11-04 | target-ppc: Fix vcmpbfp. Unordered Case | Tom Musta | 1 | -1/+1 |
| 2014-11-04 | target-ppc: Fix Altivec Shifts | Tom Musta | 1 | -11/+2 |
| 2014-11-04 | target-ppc: simplify AES emulation | Aurelien Jarno | 1 | -2/+2 |
| 2014-11-04 | ppc: do not look at the MMU index to detect PR/HV mode | Paolo Bonzini | 1 | -88/+77 |
| 2014-11-04 | target-ppc: kvm: Fix memory overflow issue about strncat() | Chen Gang | 1 | -4/+4 |
| 2014-11-04 | target-ppc: Fix an invalid free in opcode table handling code. | Bharata B Rao | 1 | -3/+16 |
| 2014-11-04 | target-ppc: Use macros in opcodes table handling code | Bharata B Rao | 2 | -11/+16 |
| 2014-11-04 | target-ppc : Add new processor type 440x5wDFPU | Pierre Mallard | 2 | -0/+41 |
| 2014-11-04 | target-ppc : Allow fc[tf]id[*] mnemonics for non TARGET_PPC64 | Pierre Mallard | 5 | -22/+16 |
| 2014-11-04 | target-ppc: Implement IVOR[59] By Default for Book E | Tom Musta | 1 | -1/+1 |
| 2014-11-04 | target-ppc: Fix kvmppc_set_compat to use negotiated cpu-version | Alexey Kardashevskiy | 1 | -1/+1 |
| 2014-11-04 | ppc: compute mask from BI using right shift | Paolo Bonzini | 1 | -3/+3 |
| 2014-11-04 | ppc: rename gen_set_cr6_from_fpscr | Paolo Bonzini | 1 | -7/+7 |
