Age | Commit message (Expand) | Author | Files | Lines |
2016-06-14 | ppc: Add PowerISA 2.07 compatibility mode | Thomas Huth | 1 | -0/+3 |
2016-06-14 | ppc: Improve PCR bit selection in ppc_set_compat() | Thomas Huth | 2 | -4/+13 |
2016-06-14 | ppc: Provide function to get CPU class of the host CPU | Thomas Huth | 2 | -5/+21 |
2016-06-14 | ppc: Split pcr_mask settings into supported bits and the register mask | Thomas Huth | 3 | -3/+7 |
2016-06-07 | Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging | Peter Maydell | 1 | -2/+0 |
2016-06-07 | virtio: move bi-endian target support to a single location | Greg Kurz | 1 | -2/+0 |
2016-06-07 | ppc: Do not take exceptions on unknown SPRs in privileged mode | Benjamin Herrenschmidt | 1 | -2/+9 |
2016-06-07 | ppc: Add missing slbfee. instruction on ppc64 BookS processors | Benjamin Herrenschmidt | 3 | -0/+57 |
2016-06-07 | ppc: Fix slbia decode | Benjamin Herrenschmidt | 1 | -1/+1 |
2016-06-07 | ppc: Fix mtmsr decoding | Benjamin Herrenschmidt | 1 | -1/+1 |
2016-06-07 | ppc: POWER7 has lq/stq instructions and stq need to check ISA | Benjamin Herrenschmidt | 2 | -2/+5 |
2016-06-07 | ppc: POWER7 had ACOP and PID registers | Benjamin Herrenschmidt | 1 | -0/+18 |
2016-06-07 | ppc: Batch TLB flushes on 32-bit 6xx/7xx/7xxx in hash mode | Benjamin Herrenschmidt | 4 | -44/+31 |
2016-06-07 | ppc: Fix tlb invalidations on 6xx/7xx/7xxx 32-bit processors | Benjamin Herrenschmidt | 1 | -0/+8 |
2016-06-07 | ppc: Properly tag the translation cache based on MMU mode | Benjamin Herrenschmidt | 1 | -1/+1 |
2016-06-07 | target-ppc: fixup bitrot in mmu_helper.c debug statements | Mark Cave-Ayland | 1 | -14/+24 |
2016-06-07 | ppc: fix hrfid, tlbia and slbia privilege | Cédric Le Goater | 1 | -3/+3 |
2016-06-07 | ppc: Fix hreg_store_msr() so that non-HV mode cannot alter MSR:HV | Benjamin Herrenschmidt | 2 | -4/+8 |
2016-06-07 | ppc: Better figure out if processor has HV mode | Benjamin Herrenschmidt | 3 | -5/+22 |
2016-06-07 | target-ppc/fpu_helper: Fix efscmp* instructions handling | Talha Imran | 1 | -1/+1 |
2016-06-05 | target-*: dfilter support for in_asm | Richard Henderson | 1 | -1/+2 |
2016-05-30 | ppc: Add PPC_64H instruction flag to POWER7 and POWER8 | Benjamin Herrenschmidt | 1 | -2/+2 |
2016-05-30 | ppc: Get out of emulation on SMT "OR" ops | Benjamin Herrenschmidt | 1 | -3/+18 |
2016-05-30 | ppc: Fix sign extension issue in mtmsr(d) emulation | Michael Neuling | 1 | -2/+2 |
2016-05-30 | ppc: Change 'invalid' bit mask of tlbiel and tlbie | Benjamin Herrenschmidt | 1 | -2/+4 |
2016-05-30 | ppc: tlbie, tlbia and tlbisync are HV only | Benjamin Herrenschmidt | 1 | -3/+3 |
2016-05-30 | ppc: Do some batching of TCG tlb flushes | Benjamin Herrenschmidt | 7 | -12/+71 |
2016-05-30 | ppc: Use split I/D mmu modes to avoid flushes on interrupts | Benjamin Herrenschmidt | 5 | -25/+63 |
2016-05-30 | ppc: Remove MMU_MODEn_SUFFIX definitions | Benjamin Herrenschmidt | 1 | -3/+0 |
2016-05-27 | spapr_iommu: Finish renaming vfio_accel to need_vfio | Alexey Kardashevskiy | 1 | -1/+1 |
2016-05-27 | PPC/KVM: early validation of vcpu id | Greg Kurz | 1 | -0/+8 |
2016-05-27 | target-ppc: Cleanups to rldinm, rldnm, rldimi | Richard Henderson | 1 | -45/+46 |
2016-05-27 | target-ppc: Use 32-bit rotate instead of deposit + 64-bit rotate | Richard Henderson | 1 | -102/+70 |
2016-05-27 | target-ppc: Use movcond in isel | Richard Henderson | 1 | -18/+11 |
2016-05-27 | target-ppc: Correct KVM synchronization for ppc_hash64_set_external_hpt() | David Gibson | 1 | -2/+0 |
2016-05-19 | cpu: move exec-all.h inclusion out of cpu.h | Paolo Bonzini | 11 | -2/+12 |
2016-05-19 | qemu-common: push cpu.h inclusion out of qemu-common.h | Paolo Bonzini | 4 | -1/+5 |
2016-05-19 | hw: move CPU state serialization to migration/cpu.h | Paolo Bonzini | 1 | -0/+1 |
2016-05-19 | ppc: use PowerPCCPU instead of CPUPPCState | Paolo Bonzini | 1 | -54/+38 |
2016-05-19 | target-ppc: make cpu-qom.h not target specific | Paolo Bonzini | 2 | -163/+161 |
2016-05-19 | target-ppc: do not make PowerPCCPUClass depend on target-specific symbols | Paolo Bonzini | 1 | -4/+0 |
2016-05-19 | target-ppc: do not use target_ulong in cpu-qom.h | Paolo Bonzini | 5 | -6/+5 |
2016-05-19 | cpu: make cpu-qom.h only include-able from cpu.h | Paolo Bonzini | 1 | -1/+0 |
2016-05-12 | tcg: Allow goto_tb to any target PC in user mode | Sergey Fedorov | 1 | -5/+15 |
2016-05-12 | tb: consistently use uint32_t for tb->flags | Emilio G. Cota | 1 | -1/+1 |
2016-04-18 | ppc: Fix migration of the XER register | Thomas Huth | 1 | -1/+1 |
2016-04-18 | ppc: Fix the bad exception NIP value and the range check in LSWX | Thomas Huth | 1 | -2/+3 |
2016-04-18 | ppc: Fix the range check in the LSWI instruction | Thomas Huth | 2 | -4/+12 |
2016-04-05 | ppc: Rework POWER7 & POWER8 exception model | Cédric Le Goater | 3 | -3/+58 |
2016-03-24 | Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging | Peter Maydell | 3 | -2/+5 |