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2016-03-18target-ppc: Document TOCTTOU in hugepage supportMarkus Armbruster1-0/+6
2016-03-16target-ppc: Eliminate kvmppc_kern_htab globalDavid Gibson2-28/+21
2016-03-16target-ppc: Add helpers for updating a CPU's SDR1 and external HPTDavid Gibson5-8/+62
2016-03-16target-ppc: Split out SREGS get/put functionsDavid Gibson1-193/+228
2016-03-16target-ppc: Add PVR for POWER8NVL processorAlexey Kardashevskiy3-0/+8
2016-03-16ppc: Add a few more P8 PMU SPRsBenjamin Herrenschmidt2-0/+35
2016-03-16ppc: Fix migration of the TAR SPRThomas Huth1-4/+4
2016-03-16ppc: Define the PSPB register on POWER8Thomas Huth2-0/+10
2016-03-01tcg: Add type for vCPU pointersLluís Vilanova1-1/+1
2016-02-25ppc/kvm: Tell the user what might be wrong when using bad CPU types with kvm-hvThomas Huth1-0/+4
2016-02-25ppc/kvm: Use error_report() instead of cpu_abort() for user-triggerable errorsThomas Huth1-2/+5
2016-02-25hw/ppc/spapr: Implement the h_page_init hypercallThomas Huth1-2/+34
2016-02-23all: Clean up includesPeter Maydell1-1/+0
2016-02-17target-ppc: Remove hack for ppc_hash64_load_hpte*() with HV KVMDavid Gibson1-2/+2
2016-02-17target-ppc: Include missing MMU models for SDR1 in info registersDavid Gibson1-0/+2
2016-02-17target-ppc: Remove unused kvmppc_update_sdr1() stubDavid Gibson1-5/+0
2016-02-09Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2016-02-09' into ...Peter Maydell1-6/+6
2016-02-09tcg: Change tcg_global_mem_new_* to take a TCGv_ptrRichard Henderson1-22/+22
2016-02-08qom: Swap 'name' next to visitor in ObjectPropertyAccessorEric Blake1-4/+4
2016-02-08qapi: Swap visit_* arguments for consistent 'name' placementEric Blake1-2/+2
2016-02-03log: do not unnecessarily include qom/cpu.hPaolo Bonzini4-0/+4
2016-02-01target-ppc: mcrfs should always update FEX/VX and only clear exception bitsJames Clarke2-4/+23
2016-01-30target-ppc: Make every FPSCR_ macro have a corresponding FP_ macroJames Clarke1-9/+22
2016-01-30target-ppc: Allow more page sizes for POWER7 & POWER8 in TCGDavid Gibson2-0/+34
2016-01-30target-ppc: Helper to determine page size information from hpte aloneDavid Gibson2-0/+38
2016-01-30target-ppc: Add new TLB invalidate by HPTE call for hash64 MMUsDavid Gibson2-0/+15
2016-01-30target-ppc: Split 44x tlbiva from ppc_tlb_invalidate_one()David Gibson3-5/+12
2016-01-30target-ppc: Remove unused mmu models from ppc_tlb_invalidate_oneDavid Gibson1-44/+2
2016-01-30target-ppc: Use actual page size encodings from HPTEDavid Gibson1-3/+60
2016-01-30target-ppc: Rework SLB page size lookupDavid Gibson3-39/+56
2016-01-30target-ppc: Rework ppc_store_slbDavid Gibson4-22/+21
2016-01-30target-ppc: Convert mmu-hash{32,64}.[ch] from CPUPPCState to PowerPCCPUDavid Gibson6-93/+121
2016-01-30target-ppc: Remove unused kvmppc_read_segment_page_sizes() stubDavid Gibson1-5/+0
2016-01-30target-ppc: gdbstub: Add VSX supportAnton Blanchard1-0/+24
2016-01-30target-ppc: gdbstub: fix spe registers for little-endian guestsGreg Kurz1-1/+10
2016-01-30target-ppc: gdbstub: fix altivec registers for little-endian guestsGreg Kurz1-2/+10
2016-01-30target-ppc: gdbstub: introduce avr_need_swap()Greg Kurz1-14/+23
2016-01-30target-ppc: gdbstub: fix float registers for little-endian guestsGreg Kurz1-0/+4
2016-01-30target-ppc: rename and export maybe_bswap_register()Greg Kurz2-5/+6
2016-01-30target-ppc: kvm: fix floating point registers sync on little-endian hostsGreg Kurz1-0/+12
2016-01-30ppc: Clean up error handling in ppc_set_compat()David Gibson2-7/+8
2016-01-30target-ppc: use cpu_write_xer() helper in cpu_post_loadMark Cave-Ayland1-1/+1
2016-01-30target-ppc: Use sensible POWER8/POWER8E versionsBenjamin Herrenschmidt2-8/+8
2016-01-29ppc: Clean up includesPeter Maydell21-7/+21
2016-01-27gdb: provide the name of the architecture in the target.xmlDavid Hildenbrand1-0/+10
2016-01-15dump: qemunotes aren't commonly neededAndrew Jones3-9/+0
2016-01-11target-ppc: Define kvmppc_read_int_dt()Sukadev Bhattiprolu1-14/+22
2015-12-17ppc: cleanup loggingPaolo Bonzini6-43/+26
2015-12-17qemu-log: introduce qemu_log_separatePaolo Bonzini2-20/+27
2015-11-30target-ppc/fpu_helper: fix FPSCR_FX bit shift operationMadhavan Srinivasan1-11/+11
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