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AgeCommit message (Expand)AuthorFilesLines
2016-05-19cpu: move exec-all.h inclusion out of cpu.hPaolo Bonzini11-2/+12
2016-05-19qemu-common: push cpu.h inclusion out of qemu-common.hPaolo Bonzini4-1/+5
2016-05-19hw: move CPU state serialization to migration/cpu.hPaolo Bonzini1-0/+1
2016-05-19ppc: use PowerPCCPU instead of CPUPPCStatePaolo Bonzini1-54/+38
2016-05-19target-ppc: make cpu-qom.h not target specificPaolo Bonzini2-163/+161
2016-05-19target-ppc: do not make PowerPCCPUClass depend on target-specific symbolsPaolo Bonzini1-4/+0
2016-05-19target-ppc: do not use target_ulong in cpu-qom.hPaolo Bonzini5-6/+5
2016-05-19cpu: make cpu-qom.h only include-able from cpu.hPaolo Bonzini1-1/+0
2016-05-12tcg: Allow goto_tb to any target PC in user modeSergey Fedorov1-5/+15
2016-05-12tb: consistently use uint32_t for tb->flagsEmilio G. Cota1-1/+1
2016-04-18ppc: Fix migration of the XER registerThomas Huth1-1/+1
2016-04-18ppc: Fix the bad exception NIP value and the range check in LSWXThomas Huth1-2/+3
2016-04-18ppc: Fix the range check in the LSWI instructionThomas Huth2-4/+12
2016-04-05ppc: Rework POWER7 & POWER8 exception modelCédric Le Goater3-3/+58
2016-03-24Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell3-2/+5
2016-03-24ppc: move POWER8 Book4 regs in their own routineCédric Le Goater1-0/+8
2016-03-24ppc: A couple more dummy POWER8 Book4 regsBenjamin Herrenschmidt2-0/+15
2016-03-24ppc: Add dummy CIABR SPRBenjamin Herrenschmidt2-0/+6
2016-03-24ppc: Add POWER8 IAMR registerBenjamin Herrenschmidt2-2/+40
2016-03-24ppc: Fix writing to AMR/UAMORBenjamin Herrenschmidt1-15/+59
2016-03-24ppc: Initialize AMOR in PAPR modeBenjamin Herrenschmidt1-0/+4
2016-03-24ppc: Add dummy SPR_IC for POWER8Benjamin Herrenschmidt2-0/+13
2016-03-24ppc: Create cpu_ppc_set_papr() helperBenjamin Herrenschmidt2-1/+23
2016-03-24ppc: Add a bunch of hypervisor SPRs to Book3sBenjamin Herrenschmidt1-0/+21
2016-03-24ppc: Add macros to register hypervisor mode SPRsBenjamin Herrenschmidt2-14/+47
2016-03-24ppc: Update SPR definitionsBenjamin Herrenschmidt1-7/+47
2016-03-24spapr/target-ppc/kvm: Only add hcall-instructions if KVM supports itAlexey Kardashevskiy1-1/+1
2016-03-24ppc64: set MSR_SF bitLaurent Vivier1-1/+1
2016-03-22util: move declarations out of qemu-common.hVeronia Bahaa1-0/+1
2016-03-22Replaced get_tick_per_sec() by NANOSECONDS_PER_SECONDRutuja Shah1-2/+2
2016-03-22include/qemu/osdep.h: Don't include qapi/error.hMarkus Armbruster2-0/+2
2016-03-18target-ppc: Document TOCTTOU in hugepage supportMarkus Armbruster1-0/+6
2016-03-16target-ppc: Eliminate kvmppc_kern_htab globalDavid Gibson2-28/+21
2016-03-16target-ppc: Add helpers for updating a CPU's SDR1 and external HPTDavid Gibson5-8/+62
2016-03-16target-ppc: Split out SREGS get/put functionsDavid Gibson1-193/+228
2016-03-16target-ppc: Add PVR for POWER8NVL processorAlexey Kardashevskiy3-0/+8
2016-03-16ppc: Add a few more P8 PMU SPRsBenjamin Herrenschmidt2-0/+35
2016-03-16ppc: Fix migration of the TAR SPRThomas Huth1-4/+4
2016-03-16ppc: Define the PSPB register on POWER8Thomas Huth2-0/+10
2016-03-01tcg: Add type for vCPU pointersLluís Vilanova1-1/+1
2016-02-25ppc/kvm: Tell the user what might be wrong when using bad CPU types with kvm-hvThomas Huth1-0/+4
2016-02-25ppc/kvm: Use error_report() instead of cpu_abort() for user-triggerable errorsThomas Huth1-2/+5
2016-02-25hw/ppc/spapr: Implement the h_page_init hypercallThomas Huth1-2/+34
2016-02-23all: Clean up includesPeter Maydell1-1/+0
2016-02-17target-ppc: Remove hack for ppc_hash64_load_hpte*() with HV KVMDavid Gibson1-2/+2
2016-02-17target-ppc: Include missing MMU models for SDR1 in info registersDavid Gibson1-0/+2
2016-02-17target-ppc: Remove unused kvmppc_update_sdr1() stubDavid Gibson1-5/+0
2016-02-09Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2016-02-09' into ...Peter Maydell1-6/+6
2016-02-09tcg: Change tcg_global_mem_new_* to take a TCGv_ptrRichard Henderson1-22/+22
2016-02-08qom: Swap 'name' next to visitor in ObjectPropertyAccessorEric Blake1-4/+4
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