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AgeCommit message (Expand)AuthorFilesLines
2007-10-31Fix CR ops with complement, thanks to Julian Seward for testingj_mayer3-24/+27
2007-10-29Fix two PowerPC FPU emulation bugs (thanks to Aurelien Jarno)j_mayer1-2/+2
2007-10-29Adjust s390 addresses (the MSB is defined as "to be ignored").ths1-1/+5
2007-10-28Make Alpha and PowerPC targets use shared helpersj_mayer3-89/+25
2007-10-28PowerPC coding style and inlining fixes.j_mayer3-42/+46
2007-10-27PowerPC floating-point helper typo.j_mayer1-2/+2
2007-10-27PowerPC float bugfix: 64 bits float mantissa is 52 bits long.j_mayer1-2/+2
2007-10-27Fix PowerPC FPSCR update and floating-point exception generationj_mayer7-336/+1120
2007-10-27Fix endianness bug for PowerPC stfiwx instruction.j_mayer1-2/+11
2007-10-26For consistency, align the address to the cache line before using it,j_mayer1-2/+2
2007-10-26Bugfix in PowerPC dcbi instruction:j_mayer1-5/+2
2007-10-26Pretty dump for specific PowerPC instructions names.j_mayer1-35/+75
2007-10-26Make PowerPC hypervisor resources able to compile, even if not enabled for now.j_mayer1-6/+18
2007-10-26Bugfix: PowerPC 64 slbia never invalidates the first segment entry.j_mayer1-1/+2
2007-10-25Fix PowerPC 64x64 bits multiplication overflow check.j_mayer1-1/+2
2007-10-25Use host-utils for PowerPC 64 64x64 bits multiplications.j_mayer3-78/+3
2007-10-25Add PowerPC power-management state check callback.j_mayer1-0/+1
2007-10-25Implement power-management for all defined PowerPC CPUs.j_mayer2-30/+174
2007-10-25Update PowerPC emulation status file.j_mayer1-20/+39
2007-10-25Allow selection of all defined PowerPC 74xx (aka G4) CPUs.j_mayer1-36/+0
2007-10-25Gprof prooved the PowerPC emulation spent too much time in MSR load and storej_mayer8-461/+398
2007-10-14Properly implement non-execute bit on PowerPC segments and PTEs.j_mayer2-127/+139
2007-10-14Merge PowerPC 620 input bus definitions with standard PowerPC 6xx.j_mayer1-26/+19
2007-10-14There is no need of a specific MMU model for PowerPC 601.j_mayer3-27/+1
2007-10-14Implement PowerPC 64 SLB invalidation helpers.j_mayer1-19/+63
2007-10-14Do not allow PowerPC CPU restart after entering checkstop mode.j_mayer1-5/+12
2007-10-14Generate micro-ops for PowerPC hypervisor mode.j_mayer2-0/+10
2007-10-14Replace is_user variable with mmu_idx in softmmu core,j_mayer5-15/+32
2007-10-12Unify '-cpu ?' option.j_mayer1-0/+1
2007-10-08Update PowerPC emulation status file.j_mayer1-15/+45
2007-10-08Remove synonymous in PowerPC MSR bits definitions.j_mayer3-72/+193
2007-10-08Real-mode only PowerPC 40x do not have any TLBs.j_mayer2-2/+2
2007-10-08Implement exception prefix feature for PowerPC 601.j_mayer2-7/+8
2007-10-08Add missing exception vectors for PowerPC 7x5.j_mayer1-1/+27
2007-10-07Work-around C89 and/or "old" gcc unspecified behavior (#if in macro calls).j_mayer2-28/+16
2007-10-07Implement PowerPC Altivec load & stores, used by Apple firmware for memcpy.j_mayer5-8/+274
2007-10-07PowerPC target coding style fixes.j_mayer5-27/+20
2007-10-07PowerPC target optimisations: make intensive use of always_inline.j_mayer7-236/+255
2007-10-07Reorganize the CPUPPCState structure to group features.j_mayer3-19/+69
2007-10-07Add MSR bits signification per PowerPC implementation flags (to be continued).j_mayer4-61/+122
2007-10-05Full implementation of PowerPC 64 MMU, just missing support for 1 TBj_mayer5-119/+373
2007-10-05Rename PowerPC MMUCSR0 and MMUCFG SPRs: those are not BookE specific.j_mayer2-4/+4
2007-10-05PowerPC hardware reset vector is now considered as part of the exception model.j_mayer2-137/+31
2007-10-04More cache tuning fixes:j_mayer2-3/+23
2007-10-04Make PowerPC cache line size implementation dependant.j_mayer7-60/+620
2007-10-03HID0 is a write-clear register on 970 (DBSR).j_mayer1-3/+3
2007-10-03Enable PowerPC 64 MMU model and exceptions.j_mayer1-68/+71
2007-10-03Fix PowerPC initialisation and first reset:j_mayer1-1/+4
2007-10-03We never have to export ppc_set_irq.j_mayer3-13/+40
2007-10-02Code provision for hypervisor mode memory accesses.j_mayer1-108/+245
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